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-rw-r--r--board/quantum/Makefile8
-rw-r--r--board/quantum/fpga.c247
-rw-r--r--board/quantum/fpga.h16
-rw-r--r--board/quantum/quantum.c243
-rw-r--r--board/quantum/u-boot.lds82
-rw-r--r--board/quantum/u-boot.lds.debug114
6 files changed, 0 insertions, 710 deletions
diff --git a/board/quantum/Makefile b/board/quantum/Makefile
deleted file mode 100644
index 6918f63c3e..0000000000
--- a/board/quantum/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = quantum.o fpga.o
diff --git a/board/quantum/fpga.c b/board/quantum/fpga.c
deleted file mode 100644
index 4bd391a546..0000000000
--- a/board/quantum/fpga.c
+++ /dev/null
@@ -1,247 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-/* The DEBUG define must be before common to enable debugging */
-#undef DEBUG
-#include <common.h>
-#include <asm/processor.h>
-#include <command.h>
-#include "fpga.h"
-/* ------------------------------------------------------------------------- */
-
-#define MAX_ONES 226
-
-/* MPC850 port D */
-#define PD(bit) (1 << (15 - (bit)))
-# define FPGA_INIT PD(11) /* FPGA init pin (ppc input) */
-# define FPGA_PRG PD(12) /* FPGA program pin (ppc output) */
-# define FPGA_CLK PD(13) /* FPGA clk pin (ppc output) */
-# define FPGA_DATA PD(14) /* FPGA data pin (ppc output) */
-# define FPGA_DONE PD(15) /* FPGA done pin (ppc input) */
-
-
-/* DDR 0 - input, 1 - output */
-#define FPGA_INIT_PDDIR FPGA_PRG | FPGA_CLK | FPGA_DATA /* just set outputs */
-
-
-#define SET_FPGA(data) immr->im_ioport.iop_pddat = (data)
-#define GET_FPGA immr->im_ioport.iop_pddat
-
-#define FPGA_WRITE_1 { \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set data to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
-
-#define FPGA_WRITE_0 { \
- SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \
- SET_FPGA(FPGA_PRG); /* set data to 0 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK); /* set clock to 1 */ \
- SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
-
-
-int fpga_boot (unsigned char *fpgadata, int size)
-{
- volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
- int i, index, len;
- int count;
-
-#ifdef CONFIG_SYS_FPGA_SPARTAN2
- int j;
- unsigned char data;
-#else
- unsigned char b;
- int bit;
-#endif
-
- debug ("fpga_boot: fpgadata = %p, size = %d\n", fpgadata, size);
-
- /* display infos on fpgaimage */
- printf ("FPGA:");
- index = 15;
- for (i = 0; i < 4; i++) {
- len = fpgadata[index];
- printf (" %s", &(fpgadata[index + 1]));
- index += len + 3;
- }
- printf ("\n");
-
-
- index = 0;
-
-#ifdef CONFIG_SYS_FPGA_SPARTAN2
- /* search for preamble 0xFFFFFFFF */
- while (1) {
- if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff)
- && (fpgadata[index + 2] == 0xff)
- && (fpgadata[index + 3] == 0xff))
- break; /* preamble found */
- else
- index++;
- }
-#else
- /* search for preamble 0xFF2X */
- for (index = 0; index < size - 1; index++) {
- if ((fpgadata[index] == 0xff)
- && ((fpgadata[index + 1] & 0xf0) == 0x30))
- break;
- }
- index += 2;
-#endif
-
- debug ("FPGA: configdata starts at position 0x%x\n", index);
- debug ("FPGA: length of fpga-data %d\n", size - index);
-
- /*
- * Setup port pins for fpga programming
- */
- immr->im_ioport.iop_pddir = FPGA_INIT_PDDIR;
-
- debug ("%s, ", ((GET_FPGA & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- debug ("%s\n", ((GET_FPGA & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /*
- * Init fpga by asserting and deasserting PROGRAM*
- */
- SET_FPGA (FPGA_CLK | FPGA_DATA);
-
- /* Wait for FPGA init line low */
- count = 0;
- while (GET_FPGA & FPGA_INIT) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout - 100us max, so use 3ms */
- if (count++ > 3) {
- debug ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_LOW;
- }
- }
-
- debug ("%s, ", ((GET_FPGA & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- debug ("%s\n", ((GET_FPGA & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /* deassert PROGRAM* */
- SET_FPGA (FPGA_PRG | FPGA_CLK | FPGA_DATA);
-
- /* Wait for FPGA end of init period . */
- count = 0;
- while (!(GET_FPGA & FPGA_INIT)) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3) {
- debug ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_INIT_HIGH;
- }
- }
-
- debug ("%s, ", ((GET_FPGA & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- debug ("%s\n", ((GET_FPGA & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- debug ("write configuration data into fpga\n");
- /* write configuration-data into fpga... */
-
-#ifdef CONFIG_SYS_FPGA_SPARTAN2
- /*
- * Load uncompressed image into fpga
- */
- for (i = index; i < size; i++) {
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if ((i % 1024) == 0)
- printf ("%6d out of %6d\r", i, size); /* let them know we are alive */
-#endif
-
- data = fpgadata[i];
- for (j = 0; j < 8; j++) {
- if ((data & 0x80) == 0x80) {
- FPGA_WRITE_1;
- } else {
- FPGA_WRITE_0;
- }
- data <<= 1;
- }
- }
- /* add some 0xff to the end of the file */
- for (i = 0; i < 8; i++) {
- data = 0xff;
- for (j = 0; j < 8; j++) {
- if ((data & 0x80) == 0x80) {
- FPGA_WRITE_1;
- } else {
- FPGA_WRITE_0;
- }
- data <<= 1;
- }
- }
-#else
- /* send 0xff 0x20 */
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_1;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_1;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
- FPGA_WRITE_0;
-
- /*
- ** Bit_DeCompression
- ** Code 1 .. maxOnes : n '1's followed by '0'
- ** maxOnes + 1 .. maxOnes + 1 : n - 1 '1's no '0'
- ** maxOnes + 2 .. 254 : n - (maxOnes + 2) '0's followed by '1'
- ** 255 : '1'
- */
-
- for (i = index; i < size; i++) {
- b = fpgadata[i];
- if ((b >= 1) && (b <= MAX_ONES)) {
- for (bit = 0; bit < b; bit++) {
- FPGA_WRITE_1;
- }
- FPGA_WRITE_0;
- } else if (b == (MAX_ONES + 1)) {
- for (bit = 1; bit < b; bit++) {
- FPGA_WRITE_1;
- }
- } else if ((b >= (MAX_ONES + 2)) && (b <= 254)) {
- for (bit = 0; bit < (b - (MAX_ONES + 2)); bit++) {
- FPGA_WRITE_0;
- }
- FPGA_WRITE_1;
- } else if (b == 255) {
- FPGA_WRITE_1;
- }
- }
-#endif
- debug ("\n\n");
- debug ("%s, ", ((GET_FPGA & FPGA_DONE) == 0) ? "NOT DONE" : "DONE");
- debug ("%s\n", ((GET_FPGA & FPGA_INIT) == 0) ? "NOT INIT" : "INIT");
-
- /*
- * Check if fpga's DONE signal - correctly booted ?
- */
-
- /* Wait for FPGA end of programming period . */
- count = 0;
- while (!(GET_FPGA & FPGA_DONE)) {
- udelay (1000); /* wait 1ms */
- /* Check for timeout */
- if (count++ > 3) {
- debug ("FPGA: Booting failed!\n");
- return ERROR_FPGA_PRG_DONE;
- }
- }
-
- debug ("FPGA: Booting successful!\n");
- return 0;
-}
diff --git a/board/quantum/fpga.h b/board/quantum/fpga.h
deleted file mode 100644
index a9f4086297..0000000000
--- a/board/quantum/fpga.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- * Keith Outwater, keith_outwater@mvis.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * Virtex2 FPGA configuration support for the QUANTUM computer
- */
-int fpga_boot(unsigned char *fpgadata, int size);
-
-#define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */
-#define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */
-#define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */
diff --git a/board/quantum/quantum.c b/board/quantum/quantum.c
deleted file mode 100644
index 17e3fc2679..0000000000
--- a/board/quantum/quantum.c
+++ /dev/null
@@ -1,243 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-
-#include <common.h>
-#include <mpc8xx.h>
-#include "fpga.h"
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-unsigned long flash_init (void);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFCC25
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 00h in UPMA RAM)
- */
- 0x0F03CC04, 0x00ACCC24, 0x1FF74C20, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Read. (Offset 08h in UPMA RAM)
- */
- 0x0F03CC04, 0x00ACCC24, 0x00FFCC20, 0x00FFCC20,
- 0x01FFCC20, 0x1FF74C20, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Single Write. (Offset 18h in UPMA RAM)
- */
- 0x0F03CC02, 0x00AC0C24, 0x1FF74C25, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Burst Write. (Offset 20h in UPMA RAM)
- */
- 0x0F03CC00, 0x00AC0C20, 0x00FFFC20, 0x00FFFC22,
- 0x01FFFC24, 0x1FF74C25, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /*
- * Refresh. (Offset 30h in UPMA RAM)
- * (Initialization code at 0x36)
- */
- 0x0FF0CC24, 0xFFFFCC24, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, 0xEFFB8C34, 0x0FF74C34,
- 0x0FFACCB4, 0x0FF5CC34, 0x0FFCC34, 0x0FFFCCB4,
-
- /*
- * Exception. (Offset 3Ch in UPMA RAM)
- */
- 0x0FEA8C34, 0x1FB54C34, 0xFFFFCC34, _NOT_USED_
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
- char buf[64];
- int i;
- int l = getenv_f("serial#", buf, sizeof(buf));
-
- puts ("Board QUANTUM, Serial No: ");
-
- for (i = 0; i < l; ++i) {
- if (buf[i] == ' ')
- break;
- putc (buf[i]);
- }
- putc ('\n');
- return (0); /* success */
-}
-
-/* ------------------------------------------------------------------------- */
-
-phys_size_t initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /* Refresh clock prescalar */
- memctl->memc_mptpr = CONFIG_SYS_MPTPR;
-
- memctl->memc_mar = 0x00000088;
-
- /* Map controller banks 1 to the SDRAM bank */
- memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
- memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
-
- memctl->memc_mamr = CONFIG_SYS_MAMR_9COL & (~(MAMR_PTAE)); /* no refresh yet */
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mcr = 0x80002136; /* SDRAM bank 0 */
- udelay (1);
-
- memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
-
- udelay (1000);
-
- /* Check Bank 0 Memory Size,
- * 9 column mode
- */
- size9 = dram_size (CONFIG_SYS_MAMR_9COL, (long *) SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
- /*
- * Final mapping:
- */
- memctl->memc_or1 = ((-size9) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM;
- udelay (1000);
-
- return (size9);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- volatile ulong *addr;
- ulong cnt, val, size;
- ulong save[32]; /* to make test non-destructive */
- unsigned char i = 0;
-
- memctl->memc_mamr = mamr_value;
-
- for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
- addr = (volatile ulong *)(base + cnt); /* pointer arith! */
-
- save[i++] = *addr;
- *addr = ~cnt;
- }
-
- /* write 0 to base address */
- addr = (volatile ulong *)base;
- save[i] = *addr;
- *addr = 0;
-
- /* check at base address */
- if ((val = *addr) != 0) {
- /* Restore the original data before leaving the function.
- */
- *addr = save[i];
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = (volatile ulong *) base + cnt;
- *addr = save[--i];
- }
- return (0);
- }
-
- for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
- addr = (volatile ulong *)(base + cnt); /* pointer arith! */
-
- val = *addr;
- *addr = save[--i];
-
- if (val != (~cnt)) {
- size = cnt * sizeof (long);
- /* Restore the original data before returning
- */
- for (cnt <<= 1; cnt <= maxsize / sizeof (long);
- cnt <<= 1) {
- addr = (volatile ulong *) base + cnt;
- *addr = save[--i];
- }
- return (size);
- }
- }
- return (maxsize);
-}
-
-/*
- * Miscellaneous intialization
- */
-int misc_init_r (void)
-{
- char *fpga_data_str = getenv ("fpgadata");
- char *fpga_size_str = getenv ("fpgasize");
- void *fpga_data;
- int fpga_size;
- int status;
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- int flash_size;
-
- /* Remap FLASH according to real size */
- flash_size = flash_init ();
- memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-flash_size & 0xFFFF8000);
- memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
-
- if (fpga_data_str && fpga_size_str) {
- fpga_data = (void *) simple_strtoul (fpga_data_str, NULL, 16);
- fpga_size = simple_strtoul (fpga_size_str, NULL, 10);
-
- status = fpga_boot (fpga_data, fpga_size);
- if (status != 0) {
- printf ("\nFPGA: Booting failed ");
- switch (status) {
- case ERROR_FPGA_PRG_INIT_LOW:
- printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_INIT_HIGH:
- printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
- break;
- case ERROR_FPGA_PRG_DONE:
- printf ("(Timeout: DONE not high after programming FPGA)\n ");
- break;
- }
- }
- }
- return 0;
-}
diff --git a/board/quantum/u-boot.lds b/board/quantum/u-boot.lds
deleted file mode 100644
index 0eb2fba00c..0000000000
--- a/board/quantum/u-boot.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .text :
- {
- arch/powerpc/cpu/mpc8xx/start.o (.text*)
- arch/powerpc/cpu/mpc8xx/traps.o (.text*)
-
- *(.text*)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- KEEP(*(.got))
- PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- }
- __bss_end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/quantum/u-boot.lds.debug b/board/quantum/u-boot.lds.debug
deleted file mode 100644
index b2c562c33d..0000000000
--- a/board/quantum/u-boot.lds.debug
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- arch/powerpc/cpu/mpc8xx/start.o (.text)
- common/dlmalloc.o (.text)
- lib/vsprintf.o (.text)
- lib/crc32.o (.text)
-
- . = env_offset;
- common/env_embedded.o(.text)
-
- *(.text)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- __bss_end = . ;
- PROVIDE (end = .);
-}
generated by cgit (git 2.34.1) at 2024-12-23 10:20:49 +0000