diff options
Diffstat (limited to 'board/technexion/pico-imx7d')
| -rw-r--r-- | board/technexion/pico-imx7d/Makefile | 2 | ||||
| -rw-r--r-- | board/technexion/pico-imx7d/imximage.cfg | 97 | ||||
| -rw-r--r-- | board/technexion/pico-imx7d/pico-imx7d.c | 2 | ||||
| -rw-r--r-- | board/technexion/pico-imx7d/spl.c | 116 |
4 files changed, 118 insertions, 99 deletions
diff --git a/board/technexion/pico-imx7d/Makefile b/board/technexion/pico-imx7d/Makefile index 6cfa80368d..4ae3d606b5 100644 --- a/board/technexion/pico-imx7d/Makefile +++ b/board/technexion/pico-imx7d/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0+ # (C) Copyright 2017 NXP Semiconductors -obj-y := pico-imx7d.o +obj-y := pico-imx7d.o spl.o diff --git a/board/technexion/pico-imx7d/imximage.cfg b/board/technexion/pico-imx7d/imximage.cfg deleted file mode 100644 index c5caff46b4..0000000000 --- a/board/technexion/pico-imx7d/imximage.cfg +++ /dev/null @@ -1,97 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017 Freescale Semiconductor, Inc. - * - * Refer docs/README.imxmage for more details about how-to configure - * and create imximage boot image - * - * The syntax is taken as close as possible with the kwbimage - */ - -#define __ASSEMBLY__ -#include <config.h> - -/* image version */ - -IMAGE_VERSION 2 - -BOOT_FROM sd - -/* Secure boot support */ -#ifdef CONFIG_SECURE_BOOT -CSF CONFIG_CSF_SIZE -#endif - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ - -DATA 4 0x30340004 0x4F400005 -/* Clear then set bit30 to ensure exit from DDR retention */ -DATA 4 0x30360388 0x40000000 -DATA 4 0x30360384 0x40000000 - -DATA 4 0x30391000 0x00000002 -DATA 4 0x307a0000 0x01040001 -DATA 4 0x307a01a0 0x80400003 -DATA 4 0x307a01a4 0x00100020 -DATA 4 0x307a01a8 0x80100004 -DATA 4 0x307a0064 0x00400046 -DATA 4 0x307a0490 0x00000001 -DATA 4 0x307a00d0 0x00020083 -DATA 4 0x307a00d4 0x00690000 -DATA 4 0x307a00dc 0x09300004 -DATA 4 0x307a00e0 0x04080000 -DATA 4 0x307a00e4 0x00100004 -DATA 4 0x307a00f4 0x0000033f -DATA 4 0x307a0100 0x09081109 -DATA 4 0x307a0104 0x0007020d -DATA 4 0x307a0108 0x03040407 -DATA 4 0x307a010c 0x00002006 -DATA 4 0x307a0110 0x04020205 -DATA 4 0x307a0114 0x03030202 -DATA 4 0x307a0120 0x00000803 -DATA 4 0x307a0180 0x00800020 -DATA 4 0x307a0184 0x02000100 -DATA 4 0x307a0190 0x02098204 -DATA 4 0x307a0194 0x00030303 -DATA 4 0x307a0200 0x00000016 -DATA 4 0x307a0204 0x00080808 -DATA 4 0x307a0210 0x00000f0f -DATA 4 0x307a0214 0x07070707 -DATA 4 0x307a0218 0x0f070707 -DATA 4 0x307a0240 0x06000604 -DATA 4 0x307a0244 0x00000001 -DATA 4 0x30391000 0x00000000 -DATA 4 0x30790000 0x17420f40 -DATA 4 0x30790004 0x10210100 -DATA 4 0x30790010 0x00060807 -DATA 4 0x307900b0 0x1010007e -DATA 4 0x3079009c 0x00000b24 -DATA 4 0x30790020 0x08080808 -DATA 4 0x30790030 0x08080808 -DATA 4 0x30790050 0x01000010 -DATA 4 0x30790050 0x00000010 - -DATA 4 0x307900c0 0x0e407304 -DATA 4 0x307900c0 0x0e447304 -DATA 4 0x307900c0 0x0e447306 - -CHECK_BITS_SET 4 0x307900c4 0x1 - -DATA 4 0x307900c0 0x0e407304 - -DATA 4 0x30384130 0x00000000 -DATA 4 0x30340020 0x00000178 -DATA 4 0x30384130 0x00000002 -DATA 4 0x30790018 0x0000000f - -CHECK_BITS_SET 4 0x307a0004 0x1 diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index 44c81ecdb3..0767d0462f 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -58,7 +58,7 @@ static struct i2c_pads_info i2c_pad_info4 = { int dram_init(void) { - gd->ram_size = PHYS_SDRAM_SIZE; + gd->ram_size = imx_ddr_size(); return 0; } diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c new file mode 100644 index 0000000000..14d96cb0c5 --- /dev/null +++ b/board/technexion/pico-imx7d/spl.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Technexion Ltd. + * + * Author: Richard Hu <richard.hu@technexion.com> + */ + +#include <asm/arch/imx-regs.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch-mx7/mx7-ddr.h> +#include <asm/gpio.h> +#include <spl.h> + +#if defined(CONFIG_SPL_BUILD) +static struct ddrc ddrc_regs_val = { + .mstr = 0x01040001, + .rfshtmg = 0x00400046, + .init1 = 0x00690000, + .init0 = 0x00020083, + .init3 = 0x09300004, + .init4 = 0x04080000, + .init5 = 0x00100004, + .rankctl = 0x0000033F, + .dramtmg0 = 0x09081109, + .dramtmg1 = 0x0007020d, + .dramtmg2 = 0x03040407, + .dramtmg3 = 0x00002006, + .dramtmg4 = 0x04020205, + .dramtmg5 = 0x03030202, + .dramtmg8 = 0x00000803, + .zqctl0 = 0x00800020, + .dfitmg0 = 0x02098204, + .dfitmg1 = 0x00030303, + .dfiupd0 = 0x80400003, + .dfiupd1 = 0x00100020, + .dfiupd2 = 0x80100004, + .addrmap4 = 0x00000F0F, + .odtcfg = 0x06000604, + .odtmap = 0x00000001, + .rfshtmg = 0x00400046, + .dramtmg0 = 0x09081109, + .addrmap0 = 0x0000001f, + .addrmap1 = 0x00080808, + .addrmap4 = 0x00000f0f, + .addrmap5 = 0x07070707, + .addrmap6 = 0x0f0f0707, +}; + +static struct ddrc_mp ddrc_mp_val = { + .pctrl_0 = 0x00000001, +}; + +static struct ddr_phy ddr_phy_regs_val = { + .phy_con0 = 0x17420f40, + .phy_con1 = 0x10210100, + .phy_con4 = 0x00060807, + .mdll_con0 = 0x1010007e, + .drvds_con0 = 0x00000d6e, + .cmd_sdll_con0 = 0x00000010, + .offset_lp_con0 = 0x0000000f, + .offset_rd_con0 = 0x08080808, + .offset_wr_con0 = 0x08080808, +}; + +static struct mx7_calibration calib_param = { + .num_val = 5, + .values = { + 0x0E407304, + 0x0E447304, + 0x0E447306, + 0x0E447304, + 0x0E447304, + }, +}; + +static void gpr_init(void) +{ + struct iomuxc_gpr_base_regs *gpr_regs = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + writel(0x4F400005, &gpr_regs->gpr[1]); +} + +static bool is_1g(void) +{ + gpio_direction_input(IMX_GPIO_NR(1, 12)); + return !gpio_get_value(IMX_GPIO_NR(1, 12)); +} + +static void ddr_init(void) +{ + if (is_1g()) { + ddrc_regs_val.addrmap5 = 0x07070707; + ddrc_regs_val.addrmap6 = 0x0f070707; + } + + mx7_dram_cfg(&ddrc_regs_val, &ddrc_mp_val, &ddr_phy_regs_val, + &calib_param); +} + +void board_init_f(ulong dummy) +{ + arch_cpu_init(); + gpr_init(); + board_early_init_f(); + timer_init(); + preloader_console_init(); + ddr_init(); + memset(__bss_start, 0, __bss_end - __bss_start); + board_init_r(NULL, 0); +} + +void reset_cpu(ulong addr) +{ +} +#endif |