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-rw-r--r--board/BuS/eb_cpu5282/Makefile2
-rw-r--r--board/BuS/eb_cpu5282/cfm_flash.c212
-rw-r--r--board/BuS/eb_cpu5282/cfm_flash.h40
-rw-r--r--board/BuS/eb_cpu5282/config.mk27
-rw-r--r--board/BuS/eb_cpu5282/eb_cpu5282.c110
-rw-r--r--board/BuS/eb_cpu5282/flash.c415
-rw-r--r--board/davedenx/qong/qong.c12
-rw-r--r--board/freescale/mx31pdk/mx31pdk.c12
-rw-r--r--board/freescale/mx35pdk/mx35pdk.c14
-rw-r--r--board/freescale/mx51evk/mx51evk.c12
-rw-r--r--board/freescale/mx53evk/mx53evk.c12
-rw-r--r--board/freescale/mx53loco/mx53loco.c21
-rw-r--r--board/genesi/mx51_efikamx/efikamx.c12
-rw-r--r--board/hale/tt01/tt01.c14
-rw-r--r--board/samsung/goni/goni.c22
-rw-r--r--board/samsung/trats/trats.c292
-rw-r--r--board/samsung/universal_c210/universal.c27
-rw-r--r--board/ttcontrol/vision2/vision2.c12
18 files changed, 488 insertions, 780 deletions
diff --git a/board/BuS/eb_cpu5282/Makefile b/board/BuS/eb_cpu5282/Makefile
index 0f14699c5e..ac860c1348 100644
--- a/board/BuS/eb_cpu5282/Makefile
+++ b/board/BuS/eb_cpu5282/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
-COBJS = $(BOARD).o cfm_flash.o flash.o
+COBJS = $(BOARD).o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/BuS/eb_cpu5282/cfm_flash.c b/board/BuS/eb_cpu5282/cfm_flash.c
deleted file mode 100644
index fe03b17581..0000000000
--- a/board/BuS/eb_cpu5282/cfm_flash.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * Basic Flash Driver for Freescale MCF 5281/5282 internal FLASH
- *
- * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/m5282.h>
-#include "cfm_flash.h"
-
-#if defined(CONFIG_M5281) || defined(CONFIG_M5282)
-
-#if (CONFIG_SYS_CLK>20000000)
- #define CFM_CLK (((long) CONFIG_SYS_CLK / (400000 * 8) + 1) | 0x40)
-#else
- #define CFM_CLK ((long) CONFIG_SYS_CLK / 400000 + 1)
-#endif
-
-#define cmf_backdoor_address(addr) (((addr) & 0x0007FFFF) | 0x04000000 | \
- (CONFIG_SYS_MBAR & 0xC0000000))
-
-void cfm_flash_print_info (flash_info_t * info)
-{
- printf ("Freescale: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FREESCALE_ID_MCF5281 & FLASH_TYPEMASK:
- printf ("MCF5281 internal FLASH\n");
- break;
- case FREESCALE_ID_MCF5282 & FLASH_TYPEMASK:
- printf ("MCF5282 internal FLASH\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-}
-
-void cfm_flash_init (flash_info_t * info)
-{
- int sector;
- ulong protection;
- MCFCFM_MCR = 0;
- MCFCFM_CLKD = CFM_CLK;
- debug ("CFM Clock divider: %ld (%d Hz @ %ld Hz)\n",CFM_CLK,\
- CONFIG_SYS_CLK / (2* ((CFM_CLK & 0x3F)+1) * (1+((CFM_CLK & 0x40)>>6)*7)),\
- CONFIG_SYS_CLK);
- MCFCFM_SACC = 0;
- MCFCFM_DACC = 0;
-
- if (MCFCFM_SEC & MCFCFM_SEC_KEYEN)
- puts("CFM backdoor access is enabled\n");
- if (MCFCFM_SEC & MCFCFM_SEC_SECSTAT)
- puts("CFM securety is enabled\n");
-
- #ifdef CONFIG_M5281
- info->flash_id = (FREESCALE_MANUFACT & FLASH_VENDMASK) |
- (FREESCALE_ID_MCF5281 & FLASH_TYPEMASK);
- info->size = 256*1024;
- info->sector_count = 16;
- #else
- info->flash_id = (FREESCALE_MANUFACT & FLASH_VENDMASK) |
- (FREESCALE_ID_MCF5282 & FLASH_TYPEMASK);
- info->size = 512*1024;
- info->sector_count = 32;
- #endif
- protection = MCFCFM_PROT;
- for (sector = 0; sector < info->sector_count; sector++)
- {
- if (sector == 0)
- {
- info->start[sector] = CONFIG_SYS_INT_FLASH_BASE;
- }
- else
- {
- info->start[sector] = info->start[sector-1] + 0x04000;
- }
- info->protect[sector] = protection & 1;
- protection >>= 1;
- }
-}
-
-int cfm_flash_readycheck(int checkblank)
-{
- int rc;
- unsigned char state;
-
- rc = ERR_OK;
- while (!(MCFCFM_USTAT & MCFCFM_USTAT_CCIF));
- state = MCFCFM_USTAT;
- if (state & MCFCFM_USTAT_ACCERR)
- {
- debug ("%s(): CFM access error",__FUNCTION__);
- rc = ERR_PROG_ERROR;
- }
- if (state & MCFCFM_USTAT_PVIOL)
- {
- debug ("%s(): CFM protection violation",__FUNCTION__);
- rc = ERR_PROTECTED;
- }
- if (checkblank)
- {
- if (!(state & MCFCFM_USTAT_BLANK))
- {
- debug ("%s(): CFM erras error",__FUNCTION__);
- rc = ERR_NOT_ERASED;
- }
- }
- MCFCFM_USTAT = state & 0x34; /* reset state */
- return rc;
-}
-
-/* Erase 16KiB = 8 2KiB pages */
-
-int cfm_flash_erase_sector (flash_info_t * info, int sector)
-{
- ulong address;
- int page;
- int rc;
- rc= ERR_OK;
- address = cmf_backdoor_address(info->start[sector]);
- for (page=0; (page<8) && (rc==ERR_OK); page++)
- {
- *(volatile __u32*) address = 0;
- MCFCFM_CMD = MCFCFM_CMD_PGERS;
- MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
- rc = cfm_flash_readycheck(0);
- if (rc==ERR_OK)
- {
- *(volatile __u32*) address = 0;
- MCFCFM_CMD = MCFCFM_CMD_PGERSVER;
- MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
- rc = cfm_flash_readycheck(1);
- }
- address += 0x800;
- }
- return rc;
-}
-
-int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
- ulong dest, data;
-
- rc = ERR_OK;
- if (addr & 3)
- {
- debug ("Byte and Word alignment not supported\n");
- rc = ERR_ALIGN;
- }
- if (cnt & 3)
- {
- debug ("Byte and Word transfer not supported\n");
- rc = ERR_ALIGN;
- }
- dest = cmf_backdoor_address(addr);
- while ((cnt>=4) && (rc == ERR_OK))
- {
- data = *((volatile u32 *) src);
- *(volatile u32*) dest = data;
- MCFCFM_CMD = MCFCFM_CMD_PGM;
- MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
- rc = cfm_flash_readycheck(0);
- if (*(volatile u32*) addr != data) rc = ERR_PROG_ERROR;
- src +=4;
- dest +=4;
- addr +=4;
- cnt -=4;
- }
- return rc;
-}
-
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-
-int cfm_flash_protect(flash_info_t * info,long sector,int prot)
-{
- int rc;
-
- rc= ERR_OK;
- if (prot)
- {
- MCFCFM_PROT |= (1<<sector);
- info->protect[sector]=1;
- }
- else
- {
- MCFCFM_PROT &= ~(1<<sector);
- info->protect[sector]=0;
- }
- return rc;
-}
-
-#endif
-
-#endif
diff --git a/board/BuS/eb_cpu5282/cfm_flash.h b/board/BuS/eb_cpu5282/cfm_flash.h
deleted file mode 100644
index ed4e7943e7..0000000000
--- a/board/BuS/eb_cpu5282/cfm_flash.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Basic Flash Driver for Freescale MCF 5282 internal FLASH
- *
- * (C) Copyright 2005 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CFM_FLASH_H_
-#define __CFM_FLASH_H_
-
-#define FREESCALE_MANUFACT 0xFACFFACF
-#define FREESCALE_ID_MCF5281 0x5281
-#define FREESCALE_ID_MCF5282 0x5282
-
-extern void cfm_flash_print_info (flash_info_t * info);
-extern int cfm_flash_erase_sector (flash_info_t * info, int sector);
-extern void cfm_flash_init (flash_info_t * info);
-extern int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-extern int cfm_flash_protect(flash_info_t * info,long sector,int prot);
-#endif
-
-#endif
diff --git a/board/BuS/eb_cpu5282/config.mk b/board/BuS/eb_cpu5282/config.mk
deleted file mode 100644
index 18fb84eb3b..0000000000
--- a/board/BuS/eb_cpu5282/config.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-ifndef CONFIG_SYS_TEXT_BASE
-CONFIG_SYS_TEXT_BASE = 0xFE000000
-endif
diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c
index d64ad1b705..f73431eff5 100644
--- a/board/BuS/eb_cpu5282/eb_cpu5282.c
+++ b/board/BuS/eb_cpu5282/eb_cpu5282.c
@@ -35,18 +35,19 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_VIDEO
unsigned long display_width;
unsigned long display_height;
+#endif
/*---------------------------------------------------------------------------*/
int checkboard (void)
{
- puts ("Board: MCF-EV1 + MCF-EV23 (BuS Elektronik GmbH & Co. KG)\n");
+ puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
- puts (" Boot from Internal FLASH\n");
+ puts(" Boot from Internal FLASH\n");
#endif
-
return 0;
}
@@ -55,29 +56,39 @@ phys_size_t initdram (int board_type)
int size, i;
size = 0;
- MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
- | MCFSDRAMC_DCR_RC ((15 * CONFIG_SYS_CLK) >> 4);
+ MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6 |
+ MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4);
+ asm (" nop");
#ifdef CONFIG_SYS_SDRAM_BASE0
-
- MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE0)
- | MCFSDRAMC_DACR_CASL (1)
- | MCFSDRAMC_DACR_CBM (3)
- | MCFSDRAMC_DACR_PS_16;
+ MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CONFIG_SYS_SDRAM_BASE0)|
+ MCFSDRAMC_DACR_CASL(1) | MCFSDRAMC_DACR_CBM(3) |
+ MCFSDRAMC_DACR_PS_32;
+ asm (" nop");
MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
+ asm (" nop");
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
+ asm (" nop");
+ for (i = 0; i < 10; i++)
+ asm (" nop");
- *(unsigned short *) (CONFIG_SYS_SDRAM_BASE0) = 0xA5A5;
+ *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0) = 0xA5A5A5A5;
+ asm (" nop");
MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
+ asm (" nop");
+
for (i = 0; i < 2000; i++)
asm (" nop");
- mbar_writeLong (MCFSDRAMC_DACR0,
- mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS);
- *(unsigned int *) (CONFIG_SYS_SDRAM_BASE0 + 0x220) = 0xA5A5;
- size += CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+
+ MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS;
+ asm (" nop");
+ /* write SDRAM mode register */
+ *(unsigned long *)(CONFIG_SYS_SDRAM_BASE0 + 0x80440) = 0xA5A5A5A5;
+ asm (" nop");
+ size += CONFIG_SYS_SDRAM_SIZE0 * 1024 * 1024;
#endif
-#ifdef CONFIG_SYS_SDRAM_BASE1
+#ifdef CONFIG_SYS_SDRAM_BASE1xx
MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CONFIG_SYS_SDRAM_BASE1)
| MCFSDRAMC_DACR_CASL (1)
| MCFSDRAMC_DACR_CBM (3)
@@ -134,38 +145,74 @@ int testdram (void)
}
#endif
+#if defined(CONFIG_HW_WATCHDOG)
+
+void hw_watchdog_init(void)
+{
+ char *s;
+ int enable;
+
+ enable = 1;
+ s = getenv("watchdog");
+ if (s != NULL)
+ if ((strncmp(s, "off", 3) == 0) || (strncmp(s, "0", 1) == 0))
+ enable = 0;
+ if (enable)
+ MCFGPTA_GPTDDR |= (1<<2);
+ else
+ MCFGPTA_GPTDDR &= ~(1<<2);
+}
+
+void hw_watchdog_reset(void)
+{
+ MCFGPTA_GPTPORT ^= (1<<2);
+}
+#endif
+
int misc_init_r(void)
{
#ifdef CONFIG_HW_WATCHDOG
hw_watchdog_init();
#endif
-#ifndef CONFIG_VIDEO
- vcxk_init(16, 16);
-#endif
return 1;
}
-#if defined(CONFIG_VIDEO)
+void __led_toggle(led_id_t mask)
+{
+ MCFGPTA_GPTPORT ^= (1 << 3);
+}
-/*
- ****h* EB+CPU5282-T1/drv_video_init
- * FUNCTION
- ***
- */
+void __led_init(led_id_t mask, int state)
+{
+ __led_set(mask, state);
+ MCFGPTA_GPTDDR |= (1 << 3);
+}
+
+void __led_set(led_id_t mask, int state)
+{
+ if (state == STATUS_LED_ON)
+ MCFGPTA_GPTPORT |= (1 << 3);
+ else
+ MCFGPTA_GPTPORT &= ~(1 << 3);
+}
+
+#if defined(CONFIG_VIDEO)
int drv_video_init(void)
{
char *s;
+#ifdef CONFIG_SPLASH_SCREEN
unsigned long splash;
-
+#endif
printf("Init Video as ");
-
- if ((s = getenv("displaywidth")) != NULL)
+ s = getenv("displaywidth");
+ if (s != NULL)
display_width = simple_strtoul(s, NULL, 10);
else
display_width = 256;
- if ((s = getenv("displayheight")) != NULL)
+ s = getenv("displayheight");
+ if (s != NULL)
display_height = simple_strtoul(s, NULL, 10);
else
display_height = 256;
@@ -178,10 +225,9 @@ int drv_video_init(void)
vcxk_init(display_width, display_height);
#ifdef CONFIG_SPLASH_SCREEN
- if ((s = getenv("splashimage")) != NULL) {
- debug("use splashimage: %s\n", s);
+ s = getenv("splashimage");
+ if (s != NULL) {
splash = simple_strtoul(s, NULL, 16);
- debug("use splashimage: %x\n", splash);
vcxk_acknowledge_wait();
video_display_bitmap(splash, 0, 0);
}
diff --git a/board/BuS/eb_cpu5282/flash.c b/board/BuS/eb_cpu5282/flash.c
deleted file mode 100644
index 8b7f9578fc..0000000000
--- a/board/BuS/eb_cpu5282/flash.c
+++ /dev/null
@@ -1,415 +0,0 @@
-/*
- * (C) Copyright 2005
- * BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
- *
- * Based On
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include "cfm_flash.h"
-
-#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
-#define FLASH_BANK_SIZE 0x200000
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV160B & FLASH_TYPEMASK):
- printf ("AM29LV160B (16Bit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
- break;
- case FREESCALE_MANUFACT & FLASH_VENDMASK:
- cfm_flash_print_info (info);
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- puts (" Size: ");
- if ((info->size >> 20) > 0)
- {
- printf ("%ld MiB",info->size >> 20);
- }
- else
- {
- printf ("%ld KiB",info->size >> 10);
- }
- printf (" in %d Sectors\n", info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 4) == 0) {
- printf ("\n ");
- }
- printf ("%02d: %08lX%s ", i,info->start[i],
- info->protect[i] ? " P" : " ");
- }
- printf ("\n\n");
-}
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- switch (i)
- {
- case 1:
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV160B & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- flashbase = PHYS_FLASH_1;
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j == 0) {
- /* 1st is 16 KiB */
- flash_info[i].start[j] = flashbase;
- }
- if ((j >= 1) && (j <= 2)) {
- /* 2nd and 3rd are 8 KiB */
- flash_info[i].start[j] =
- flashbase + 0x4000 + 0x2000 * (j - 1);
- }
- if (j == 3) {
- /* 4th is 32 KiB */
- flash_info[i].start[j] = flashbase + 0x8000;
- }
- if ((j >= 4) && (j <= 34)) {
- /* rest is 256 KiB */
- flash_info[i].start[j] =
- flashbase + 0x10000 + 0x10000 * (j - 4);
- }
- }
- break;
- case 0:
- cfm_flash_init (&flash_info[i]);
- break;
- default:
- panic ("configured to many flash banks!\n");
- }
-
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + 0xffff, &flash_info[0]);
-
- return size;
-}
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK1 0x00AA
-#define CMD_UNLOCK2 0x0055
-#define CMD_ERASE_SETUP 0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM 0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(info->start[0] + (0x00000555<<1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(info->start[0] + (0x000002AA<<1)))
-
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define ERR_READY -1
-
-int amd_flash_erase_sector(flash_info_t * info, int sector)
-{
- int state;
- ulong result;
- ulong start;
-
- volatile u16 *addr =
- (volatile u16 *) (info->start[sector]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- state = 0;
- start = get_timer(0);
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- state = ERR_TIMOUT;
- }
-
- if (!state && (result & 0xFFFF) & BIT_ERASE_DONE)
- state = ERR_READY;
- }
- while (!state);
- if (state == ERR_READY)
- state = ERR_OK;
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- return state;
-}
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int iflag, cflag;
- int sector;
- int rc;
-
- rc = ERR_OK;
-
- if (info->flash_id == FLASH_UNKNOWN)
- {
- rc = ERR_UNKNOWN_FLASH_TYPE;
- } /* (info->flash_id == FLASH_UNKNOWN) */
-
- if ((s_first < 0) || (s_first > s_last) || s_last >= info->sector_count)
- {
- rc = ERR_INVAL;
- }
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- for (sector = s_first; (sector <= s_last) && (rc == ERR_OK); sector++) {
-
- if (info->protect[sector])
- {
- putc('P'); /* protected sector will not erase */
- }
- else
- {
- /* erase on unprotected sector */
- puts("E\b");
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- rc = amd_flash_erase_sector(info,sector);
- break;
- case (FREESCALE_MANUFACT & FLASH_VENDMASK):
- rc = cfm_flash_erase_sector(info,sector);
- break;
- default:
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
- putc('.');
- }
- }
- if (rc!=ERR_OK)
- {
- printf ("\n ");
- flash_perror (rc);
- }
- else
- {
- printf (" done\n");
- }
-
- udelay (10000); /* allow flash to settle - wait 10 ms */
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-volatile static int amd_write_word (flash_info_t * info, ulong dest, u16 data)
-{
- volatile u16 *addr;
- ulong result;
- int cflag, iflag;
- int state;
- ulong start;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- addr = (volatile u16 *) dest;
-
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait until flash is ready */
- state = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- state = ERR_TIMOUT;
- }
- if (!state && ((result & BIT_RDY_MASK) == (data & BIT_RDY_MASK)))
- state = ERR_READY;
-
- } while (!state);
-
- *addr = CMD_READ_ARRAY;
-
- if (state == ERR_READY)
- state = ERR_OK;
- if ((*addr != data) && (state != ERR_TIMOUT))
- state = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return state;
-}
-
-int amd_flash_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
- ulong dest;
- u16 data;
-
- rc = ERR_OK;
- if (addr & 1)
- {
- debug ("Byte alignment not supported\n");
- rc = ERR_ALIGN;
- }
- if (cnt & 1)
- {
- debug ("Byte transfer not supported\n");
- rc = ERR_ALIGN;
- }
-
- dest = addr;
- while ((cnt>=2) && (rc == ERR_OK))
- {
- data = *((volatile u16 *) src);
- rc=amd_write_word (info,dest,data);
- src +=2;
- dest +=2;
- cnt -=2;
- }
- return rc;
-}
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- int rc;
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- rc = amd_flash_write_buff(info,src,addr,cnt);
- break;
- case (FREESCALE_MANUFACT & FLASH_VENDMASK):
- rc = cfm_flash_write_buff(info,src,addr,cnt);
- break;
- default:
- rc = ERR_UNKNOWN_FLASH_VENDOR;
- }
- return rc;
-
-}
-int amd_flash_protect(flash_info_t * info,long sector,int prot)
-{
- int rc;
- rc= ERR_OK;
- if (prot)
- {
- info->protect[sector]=1;
- }
- else
- {
- info->protect[sector]=0;
- }
- return rc;
-}
-
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-
-int flash_real_protect(flash_info_t * info,long sector,int prot)
-{
- int rc;
-
- switch (info->flash_id & FLASH_VENDMASK)
- {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- rc = amd_flash_protect(info,sector,prot);
- break;
- case (FREESCALE_MANUFACT & FLASH_VENDMASK):
- rc = cfm_flash_protect(info,sector,prot);
- break;
- default:
- rc = ERR_UNKNOWN_FLASH_VENDOR;
- }
- return rc;
-}
-
-#endif
diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c
index c41f11d60c..a3079dbca3 100644
--- a/board/davedenx/qong/qong.c
+++ b/board/davedenx/qong/qong.c
@@ -28,11 +28,12 @@
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <nand.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <fsl_pmic.h>
#include <asm/gpio.h>
#include "qong_fpga.h"
#include <watchdog.h>
+#include <errno.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -172,10 +173,15 @@ int board_late_init(void)
{
u32 val;
struct pmic *p;
+ int ret;
- pmic_init();
- p = get_pmic();
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return ret;
+ p = pmic_get("FSL_PMIC");
+ if (!p)
+ return -ENODEV;
/* Enable RTC battery */
pmic_reg_read(p, REG_POWER_CTL0, &val);
pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
index 9f8bc53e71..bc60632aa0 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -30,8 +30,9 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
#include <watchdog.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <fsl_pmic.h>
+#include <errno.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -83,10 +84,15 @@ int board_late_init(void)
{
u32 val;
struct pmic *p;
+ int ret;
- pmic_init();
- p = get_pmic();
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return ret;
+ p = pmic_get("FSL_PMIC");
+ if (!p)
+ return -ENODEV;
/* Enable RTC battery */
pmic_reg_read(p, REG_POWER_CTL0, &val);
pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c
index a12531fb89..c835b0edeb 100644
--- a/board/freescale/mx35pdk/mx35pdk.c
+++ b/board/freescale/mx35pdk/mx35pdk.c
@@ -31,7 +31,7 @@
#include <asm/arch/mx35_pins.h>
#include <asm/arch/iomux.h>
#include <i2c.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <fsl_pmic.h>
#include <mmc.h>
#include <fsl_esdhc.h>
@@ -207,7 +207,9 @@ int board_init(void)
static inline int pmic_detect(void)
{
unsigned int id;
- struct pmic *p = get_pmic();
+ struct pmic *p = pmic_get("FSL_PMIC");
+ if (!p)
+ return -ENODEV;
pmic_reg_read(p, REG_IDENTIFICATION, &id);
@@ -231,10 +233,14 @@ int board_late_init(void)
u8 val;
u32 pmic_val;
struct pmic *p;
+ int ret;
+
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return ret;
- pmic_init();
if (pmic_detect()) {
- p = get_pmic();
+ p = pmic_get("FSL_PMIC");
mxc_request_iomux(MX35_PIN_WATCHDOG_RST, MUX_CONFIG_SION |
MUX_CONFIG_ALT1);
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 421d8c2244..5504636ddf 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -33,7 +33,7 @@
#include <i2c.h>
#include <mmc.h>
#include <fsl_esdhc.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <fsl_pmic.h>
#include <mc13892.h>
#include <usb/ehci-fsl.h>
@@ -252,9 +252,15 @@ static void power_init(void)
unsigned int val;
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
struct pmic *p;
+ int ret;
+
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return;
- pmic_init();
- p = get_pmic();
+ p = pmic_get("FSL_PMIC");
+ if (!p)
+ return;
/* Write needed to Power Gate 2 register */
pmic_reg_read(p, REG_POWER_MISC, &val);
diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c
index bb4621d62e..1273501476 100644
--- a/board/freescale/mx53evk/mx53evk.c
+++ b/board/freescale/mx53evk/mx53evk.c
@@ -34,7 +34,7 @@
#include <i2c.h>
#include <mmc.h>
#include <fsl_esdhc.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <fsl_pmic.h>
#include <asm/gpio.h>
#include <mc13892.h>
@@ -123,9 +123,15 @@ void power_init(void)
{
unsigned int val;
struct pmic *p;
+ int ret;
+
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return;
- pmic_init();
- p = get_pmic();
+ p = pmic_get("FSL_PMIC");
+ if (!p)
+ return;
/* Set VDDA to 1.25V */
pmic_reg_read(p, REG_SW_2, &val);
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index a11e883186..f4a9b08420 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -36,7 +36,7 @@
#include <mmc.h>
#include <fsl_esdhc.h>
#include <asm/gpio.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <dialog_pmic.h>
#include <fsl_pmic.h>
#include <linux/fb.h>
@@ -344,10 +344,16 @@ static int power_init(void)
unsigned int val;
int ret = -1;
struct pmic *p;
+ int retval;
if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) {
- pmic_dialog_init();
- p = get_pmic();
+ retval = pmic_dialog_init(I2C_PMIC);
+ if (retval)
+ return retval;
+
+ p = pmic_get("DIALOG_PMIC");
+ if (!p)
+ return -ENODEV;
/* Set VDDA to 1.25V */
val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
@@ -363,8 +369,13 @@ static int power_init(void)
}
if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) {
- pmic_init();
- p = get_pmic();
+ retval = pmic_init(I2C_PMIC);
+ if (retval)
+ return retval;
+
+ p = pmic_get("DIALOG_PMIC");
+ if (!p)
+ return -ENODEV;
/* Set VDDGP to 1.25V for 1GHz on SW1 */
pmic_reg_read(p, REG_SW_0, &val);
diff --git a/board/genesi/mx51_efikamx/efikamx.c b/board/genesi/mx51_efikamx/efikamx.c
index c2b2823ef9..69d41db530 100644
--- a/board/genesi/mx51_efikamx/efikamx.c
+++ b/board/genesi/mx51_efikamx/efikamx.c
@@ -33,7 +33,7 @@
#include <i2c.h>
#include <mmc.h>
#include <fsl_esdhc.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <fsl_pmic.h>
#include <mc13892.h>
@@ -173,9 +173,15 @@ static void power_init(void)
unsigned int val;
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
struct pmic *p;
+ int ret;
+
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return;
- pmic_init();
- p = get_pmic();
+ p = pmic_get("FSL_PMIC");
+ if (!p)
+ return;
/* Write needed to Power Gate 2 register */
pmic_reg_read(p, REG_POWER_MISC, &val);
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index 143fcefedf..0c2cb795dd 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -25,12 +25,13 @@
#include <common.h>
#include <netdev.h>
#include <command.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <fsl_pmic.h>
#include <mc13783.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
+#include <errno.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -195,14 +196,21 @@ int board_mmc_init(bd_t *bis)
{
u32 val;
struct pmic *p;
+ int ret;
/*
* this is the first driver to use the pmic, so call
* pmic_init() here. board_late_init() is too late for
* the MMC driver.
*/
- pmic_init();
- p = get_pmic();
+
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return ret;
+
+ p = pmic_get("FSL_PMIC");
+ if (!p)
+ return -ENODEV;
/* configure pins for SDHC1 only */
mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index e8fb1ea413..ff76963925 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -25,10 +25,10 @@
#include <common.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
-#include <max8998_pmic.h>
+#include <power/max8998_pmic.h>
DECLARE_GLOBAL_DATA_PTR;
static struct s5pc110_gpio *s5pc110_gpio;
@@ -41,9 +41,17 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_GONI;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-#if defined(CONFIG_PMIC)
- pmic_init();
-#endif
+ return 0;
+}
+
+int power_init_board(void)
+{
+ int ret;
+
+ ret = pmic_init(I2C_5);
+ if (ret)
+ return ret;
+
return 0;
}
@@ -108,7 +116,9 @@ static int s5pc1xx_phy_control(int on)
{
int ret;
static int status;
- struct pmic *p = get_pmic();
+ struct pmic *p = pmic_get("MAX8998_PMIC");
+ if (!p)
+ return -ENODEV;
if (pmic_probe(p))
return -1;
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index e11a8922fc..e540190984 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -34,10 +34,13 @@
#include <asm/arch/mipi_dsim.h>
#include <asm/arch/watchdog.h>
#include <asm/arch/power.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <usb/s3c_udc.h>
-#include <max8997_pmic.h>
+#include <power/max8997_pmic.h>
#include <libtizen.h>
+#include <power/max8997_muic.h>
+#include <power/battery.h>
+#include <power/max17042_fg.h>
#include "setup.h"
@@ -68,10 +71,6 @@ int board_init(void)
check_hw_revision();
printf("HW Revision:\t0x%x\n", board_rev);
-#if defined(CONFIG_PMIC)
- pmic_init();
-#endif
-
return 0;
}
@@ -90,6 +89,275 @@ void i2c_init_board(void)
s5p_gpio_direction_output(&gpio2->y4, 1, 1);
}
+static void trats_low_power_mode(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ struct exynos4_power *pwr =
+ (struct exynos4_power *)samsung_get_base_power();
+
+ /* Power down CORE1 */
+ /* LOCAL_PWR_CFG [1:0] 0x3 EN, 0x0 DIS */
+ writel(0x0, &pwr->arm_core1_configuration);
+
+ /* Change the APLL frequency */
+ /* ENABLE (1 enable) | LOCKED (1 locked) */
+ /* [31] | [29] */
+ /* FSEL | MDIV | PDIV | SDIV */
+ /* [27] | [25:16] | [13:8] | [2:0] */
+ writel(0xa0c80604, &clk->apll_con0);
+
+ /* Change CPU0 clock divider */
+ /* CORE2_RATIO | APLL_RATIO | PCLK_DBG_RATIO | ATB_RATIO */
+ /* [30:28] | [26:24] | [22:20] | [18:16] */
+ /* PERIPH_RATIO | COREM1_RATIO | COREM0_RATIO | CORE_RATIO */
+ /* [14:12] | [10:8] | [6:4] | [2:0] */
+ writel(0x00000100, &clk->div_cpu0);
+
+ /* CLK_DIV_STAT_CPU0 - wait until clock gets stable (0 = stable) */
+ while (readl(&clk->div_stat_cpu0) & 0x1111111)
+ continue;
+
+ /* Change clock divider ratio for DMC */
+ /* DMCP_RATIO | DMCD_RATIO */
+ /* [22:20] | [18:16] */
+ /* DMC_RATIO | DPHY_RATIO | ACP_PCLK_RATIO | ACP_RATIO */
+ /* [14:12] | [10:8] | [6:4] | [2:0] */
+ writel(0x13113117, &clk->div_dmc0);
+
+ /* CLK_DIV_STAT_DMC0 - wait until clock gets stable (0 = stable) */
+ while (readl(&clk->div_stat_dmc0) & 0x11111111)
+ continue;
+
+ /* Turn off unnecessary power domains */
+ writel(0x0, &pwr->xxti_configuration); /* XXTI */
+ writel(0x0, &pwr->cam_configuration); /* CAM */
+ writel(0x0, &pwr->tv_configuration); /* TV */
+ writel(0x0, &pwr->mfc_configuration); /* MFC */
+ writel(0x0, &pwr->g3d_configuration); /* G3D */
+ writel(0x0, &pwr->gps_configuration); /* GPS */
+ writel(0x0, &pwr->gps_alive_configuration); /* GPS_ALIVE */
+
+ /* Turn off unnecessary clocks */
+ writel(0x0, &clk->gate_ip_cam); /* CAM */
+ writel(0x0, &clk->gate_ip_tv); /* TV */
+ writel(0x0, &clk->gate_ip_mfc); /* MFC */
+ writel(0x0, &clk->gate_ip_g3d); /* G3D */
+ writel(0x0, &clk->gate_ip_image); /* IMAGE */
+ writel(0x0, &clk->gate_ip_gps); /* GPS */
+}
+
+static int pmic_init_max8997(void)
+{
+ struct pmic *p = pmic_get("MAX8997_PMIC");
+ int i = 0, ret = 0;
+ u32 val;
+
+ if (pmic_probe(p))
+ return -1;
+
+ /* BUCK1 VARM: 1.2V */
+ val = (1200000 - 650000) / 25000;
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK1DVS1, val);
+ val = ENBUCK | ACTIVE_DISCHARGE; /* DVS OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK1CTRL, val);
+
+ /* BUCK2 VINT: 1.1V */
+ val = (1100000 - 650000) / 25000;
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK2DVS1, val);
+ val = ENBUCK | ACTIVE_DISCHARGE; /* DVS OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK2CTRL, val);
+
+
+ /* BUCK3 G3D: 1.1V - OFF */
+ ret |= pmic_reg_read(p, MAX8997_REG_BUCK3CTRL, &val);
+ val &= ~ENBUCK;
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK3CTRL, val);
+
+ val = (1100000 - 750000) / 50000;
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK3DVS, val);
+
+ /* BUCK4 CAMISP: 1.2V - OFF */
+ ret |= pmic_reg_read(p, MAX8997_REG_BUCK4CTRL, &val);
+ val &= ~ENBUCK;
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK4CTRL, val);
+
+ val = (1200000 - 650000) / 25000;
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK4DVS, val);
+
+ /* BUCK5 VMEM: 1.2V */
+ val = (1200000 - 650000) / 25000;
+ for (i = 0; i < 8; i++)
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK5DVS1 + i, val);
+
+ val = ENBUCK | ACTIVE_DISCHARGE; /* DVS OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK5CTRL, val);
+
+ /* BUCK6 CAM AF: 2.8V */
+ /* No Voltage Setting Register */
+ /* GNSLCT 3.0X */
+ val = GNSLCT;
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK6CTRL, val);
+
+ /* BUCK7 VCC_SUB: 2.0V */
+ val = (2000000 - 750000) / 50000;
+ ret |= pmic_reg_write(p, MAX8997_REG_BUCK7DVS, val);
+
+ /* LDO1 VADC: 3.3V */
+ val = max8997_reg_ldo(3300000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO1CTRL, val);
+
+ /* LDO1 Disable active discharging */
+ ret |= pmic_reg_read(p, MAX8997_REG_LDO1CONFIG, &val);
+ val &= ~LDO_ADE;
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO1CONFIG, val);
+
+ /* LDO2 VALIVE: 1.1V */
+ val = max8997_reg_ldo(1100000) | EN_LDO;
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO2CTRL, val);
+
+ /* LDO3 VUSB/MIPI: 1.1V */
+ val = max8997_reg_ldo(1100000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, val);
+
+ /* LDO4 VMIPI: 1.8V */
+ val = max8997_reg_ldo(1800000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO4CTRL, val);
+
+ /* LDO5 VHSIC: 1.2V */
+ val = max8997_reg_ldo(1200000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO5CTRL, val);
+
+ /* LDO6 VCC_1.8V_PDA: 1.8V */
+ val = max8997_reg_ldo(1800000) | EN_LDO;
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO6CTRL, val);
+
+ /* LDO7 CAM_ISP: 1.8V */
+ val = max8997_reg_ldo(1800000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO7CTRL, val);
+
+ /* LDO8 VDAC/VUSB: 3.3V */
+ val = max8997_reg_ldo(3300000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO8CTRL, val);
+
+ /* LDO9 VCC_2.8V_PDA: 2.8V */
+ val = max8997_reg_ldo(2800000) | EN_LDO;
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO9CTRL, val);
+
+ /* LDO10 VPLL: 1.1V */
+ val = max8997_reg_ldo(1100000) | EN_LDO;
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO10CTRL, val);
+
+ /* LDO11 TOUCH: 2.8V */
+ val = max8997_reg_ldo(2800000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO11CTRL, val);
+
+ /* LDO12 VTCAM: 1.8V */
+ val = max8997_reg_ldo(1800000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO12CTRL, val);
+
+ /* LDO13 VCC_3.0_LCD: 3.0V */
+ val = max8997_reg_ldo(3000000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO13CTRL, val);
+
+ /* LDO14 MOTOR: 3.0V */
+ val = max8997_reg_ldo(3000000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO14CTRL, val);
+
+ /* LDO15 LED_A: 2.8V */
+ val = max8997_reg_ldo(2800000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO15CTRL, val);
+
+ /* LDO16 CAM_SENSOR: 1.8V */
+ val = max8997_reg_ldo(1800000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO16CTRL, val);
+
+ /* LDO17 VTF: 2.8V */
+ val = max8997_reg_ldo(2800000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO17CTRL, val);
+
+ /* LDO18 TOUCH_LED 3.3V */
+ val = max8997_reg_ldo(3300000) | DIS_LDO; /* OFF */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO18CTRL, val);
+
+ /* LDO21 VDDQ: 1.2V */
+ val = max8997_reg_ldo(1200000) | EN_LDO;
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO21CTRL, val);
+
+ /* SAFEOUT for both 1 and 2: 4.9V, Active discharge, Enable */
+ val = (SAFEOUT_4_90V << 0) | (SAFEOUT_4_90V << 2) |
+ ACTDISSAFEO1 | ACTDISSAFEO2 | ENSAFEOUT1 | ENSAFEOUT2;
+ ret |= pmic_reg_write(p, MAX8997_REG_SAFEOUTCTRL, val);
+
+ if (ret) {
+ puts("MAX8997 PMIC setting error!\n");
+ return -1;
+ }
+ return 0;
+}
+
+int power_init_board(void)
+{
+ int chrg, ret;
+ struct power_battery *pb;
+ struct pmic *p_fg, *p_chrg, *p_muic, *p_bat;
+
+ ret = pmic_init(I2C_5);
+ ret |= pmic_init_max8997();
+ ret |= power_fg_init(I2C_9);
+ ret |= power_muic_init(I2C_5);
+ ret |= power_bat_init(0);
+ if (ret)
+ return ret;
+
+ p_fg = pmic_get("MAX17042_FG");
+ if (!p_fg) {
+ puts("MAX17042_FG: Not found\n");
+ return -ENODEV;
+ }
+
+ p_chrg = pmic_get("MAX8997_PMIC");
+ if (!p_chrg) {
+ puts("MAX8997_PMIC: Not found\n");
+ return -ENODEV;
+ }
+
+ p_muic = pmic_get("MAX8997_MUIC");
+ if (!p_muic) {
+ puts("MAX8997_MUIC: Not found\n");
+ return -ENODEV;
+ }
+
+ p_bat = pmic_get("BAT_TRATS");
+ if (!p_bat) {
+ puts("BAT_TRATS: Not found\n");
+ return -ENODEV;
+ }
+
+ p_fg->parent = p_bat;
+ p_chrg->parent = p_bat;
+ p_muic->parent = p_bat;
+
+ p_bat->low_power_mode = trats_low_power_mode;
+ p_bat->pbat->battery_init(p_bat, p_fg, p_chrg, p_muic);
+
+ pb = p_bat->pbat;
+ chrg = p_muic->chrg->chrg_type(p_muic);
+ debug("CHARGER TYPE: %d\n", chrg);
+
+ if (!p_chrg->chrg->chrg_bat_present(p_chrg)) {
+ puts("No battery detected\n");
+ return -1;
+ }
+
+ p_fg->fg->fg_battery_check(p_fg, p_bat);
+
+ if (pb->bat->state == CHARGE && chrg == CHARGER_USB)
+ puts("CHARGE Battery !\n");
+
+ return 0;
+}
+
int dram_init(void)
{
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
@@ -238,7 +506,9 @@ static int s5pc210_phy_control(int on)
{
int ret = 0;
u32 val = 0;
- struct pmic *p = get_pmic();
+ struct pmic *p = pmic_get("MAX8997_PMIC");
+ if (!p)
+ return -ENODEV;
if (pmic_probe(p))
return -1;
@@ -413,7 +683,9 @@ static void lcd_reset(void)
static int lcd_power(void)
{
int ret = 0;
- struct pmic *p = get_pmic();
+ struct pmic *p = pmic_get("MAX8997_PMIC");
+ if (!p)
+ return -ENODEV;
if (pmic_probe(p))
return 0;
@@ -473,7 +745,9 @@ static struct mipi_dsim_lcd_device mipi_lcd_device = {
static int mipi_power(void)
{
int ret = 0;
- struct pmic *p = get_pmic();
+ struct pmic *p = pmic_get("MAX8997_PMIC");
+ if (!p)
+ return -ENODEV;
if (pmic_probe(p))
return 0;
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 90fff5cf5e..36a047217c 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -27,10 +27,10 @@
#include <asm/arch/adc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
-#include <max8998_pmic.h>
+#include <power/max8998_pmic.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -58,16 +58,23 @@ int board_init(void)
gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-#if defined(CONFIG_PMIC)
- pmic_init();
-#endif
-
check_hw_revision();
printf("HW Revision:\t0x%x\n", board_rev);
return 0;
}
+int power_init_board(void)
+{
+ int ret;
+
+ ret = pmic_init(I2C_5);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
int dram_init(void)
{
gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
@@ -112,7 +119,9 @@ static unsigned short get_adc_value(int channel)
static int adc_power_control(int on)
{
int ret;
- struct pmic *p = get_pmic();
+ struct pmic *p = pmic_get("MAX8998_PMIC");
+ if (!p)
+ return -ENODEV;
if (pmic_probe(p))
return -1;
@@ -280,7 +289,9 @@ int board_mmc_init(bd_t *bis)
static int s5pc210_phy_control(int on)
{
int ret = 0;
- struct pmic *p = get_pmic();
+ struct pmic *p = pmic_get("MAX8998_PMIC");
+ if (!p)
+ return -ENODEV;
if (pmic_probe(p))
return -1;
diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index abdd1aac2b..a471fec23d 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -34,7 +34,7 @@
#include <asm/arch/sys_proto.h>
#include <i2c.h>
#include <mmc.h>
-#include <pmic.h>
+#include <power/pmic.h>
#include <fsl_esdhc.h>
#include <fsl_pmic.h>
#include <mc13892.h>
@@ -306,9 +306,15 @@ static void power_init_mx51(void)
{
unsigned int val;
struct pmic *p;
+ int ret;
+
+ ret = pmic_init(I2C_PMIC);
+ if (ret)
+ return;
- pmic_init();
- p = get_pmic();
+ p = pmic_get("FSL_PMIC");
+ if (!p)
+ return;
/* Write needed to Power Gate 2 register */
pmic_reg_read(p, REG_POWER_MISC, &val);
generated by cgit (git 2.34.1) at 2024-12-27 21:05:26 +0000