diff options
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/imx8qm_mek/imx8qm_mek.c | 2 | ||||
| -rw-r--r-- | board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 | ||||
| -rw-r--r-- | board/gateworks/gw_ventana/Kconfig | 3 | ||||
| -rw-r--r-- | board/google/Kconfig | 15 | ||||
| -rw-r--r-- | board/google/chromebook_coral/Kconfig | 43 | ||||
| -rw-r--r-- | board/google/chromebook_coral/MAINTAINERS | 6 | ||||
| -rw-r--r-- | board/google/chromebook_coral/Makefile | 5 | ||||
| -rw-r--r-- | board/google/chromebook_coral/coral.c | 19 | ||||
| -rw-r--r-- | board/toradex/apalis-imx8/apalis-imx8.c | 2 |
9 files changed, 94 insertions, 3 deletions
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c index 68be0fe0cf..667a2743a6 100644 --- a/board/freescale/imx8qm_mek/imx8qm_mek.c +++ b/board/freescale/imx8qm_mek/imx8qm_mek.c @@ -50,7 +50,7 @@ int board_early_init_f(void) return 0; } -#if IS_ENABLED(CONFIG_DM_GPIO) +#if CONFIG_IS_ENABLED(DM_GPIO) static void board_gpio_init(void) { /* TODO */ diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index 671064fae2..194eb60cd3 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -54,7 +54,7 @@ int board_early_init_f(void) return 0; } -#if IS_ENABLED(CONFIG_DM_GPIO) +#if CONFIG_IS_ENABLED(DM_GPIO) static void board_gpio_init(void) { struct gpio_desc desc; diff --git a/board/gateworks/gw_ventana/Kconfig b/board/gateworks/gw_ventana/Kconfig index 5d1bae41ac..fee910ca83 100644 --- a/board/gateworks/gw_ventana/Kconfig +++ b/board/gateworks/gw_ventana/Kconfig @@ -1,5 +1,8 @@ if TARGET_GW_VENTANA +config DM_GPIO + default y + config SYS_BOARD default "gw_ventana" diff --git a/board/google/Kconfig b/board/google/Kconfig index 679a0f1023..22c4be392f 100644 --- a/board/google/Kconfig +++ b/board/google/Kconfig @@ -8,6 +8,20 @@ choice prompt "Mainboard model" optional +config TARGET_CHROMEBOOK_CORAL + bool "Chromebook coral" + help + This is a range of Intel-based laptops released in 2018. They use an + Intel Apollo Lake SoC. The design supports WiFi, 4GB to 16GB of + LPDDR4 1600MHz SDRAM, PCIe WiFi and Bluetooth, eMMC (typically 32GB), + up two cameras (front-facing 720p and another 5MP option), USB SD + reader, microphone and speakers. It also includes two USB 3 Type A and + two Type C ports. The latter are used as power input and can also + charge external devices as well as a 4K external display. There is a + Chrome OS EC connected on LPC, a Cr50 secure chip from Google and + various display options. OEMs products include Acer Chromebook 11 + (e.g. C732, CB11, CP311) and Lenovo Chromebook (100e, 300e, 500e). + config TARGET_CHROMEBOOK_LINK bool "Chromebook link" help @@ -62,6 +76,7 @@ config TARGET_CHROMEBOOK_SAMUS_TPL endchoice +source "board/google/chromebook_coral/Kconfig" source "board/google/chromebook_link/Kconfig" source "board/google/chromebox_panther/Kconfig" source "board/google/chromebook_samus/Kconfig" diff --git a/board/google/chromebook_coral/Kconfig b/board/google/chromebook_coral/Kconfig new file mode 100644 index 0000000000..940bee89b0 --- /dev/null +++ b/board/google/chromebook_coral/Kconfig @@ -0,0 +1,43 @@ +if TARGET_CHROMEBOOK_CORAL + +config SYS_BOARD + default "chromebook_coral" + +config SYS_VENDOR + default "google" + +config SYS_SOC + default "apollolake" + +config SYS_CONFIG_NAME + default "chromebook_coral" + +config SYS_TEXT_BASE + default 0xffe00000 + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select X86_RESET_VECTOR + select INTEL_APOLLOLAKE + select BOARD_ROMSIZE_KB_16384 + +config PCIE_ECAM_BASE + default 0xf0000000 + +config EARLY_POST_CROS_EC + bool "Enable early post to Chrome OS EC" + help + Allow post codes to be sent to the Chroem OS EC early during boot, + to enable monitoring of the boot and debugging when things go wrong. + With this option enabled, the EC console can be used to watch post + codes the first part of boot. + +config SYS_CAR_ADDR + hex + default 0xfef00000 + +config SYS_CAR_SIZE + hex + default 0xc0000 + +endif diff --git a/board/google/chromebook_coral/MAINTAINERS b/board/google/chromebook_coral/MAINTAINERS new file mode 100644 index 0000000000..904227e2e2 --- /dev/null +++ b/board/google/chromebook_coral/MAINTAINERS @@ -0,0 +1,6 @@ +CHROMEBOOK_CORAL_BOARD +M: Simon Glass <sjg@chromium.org> +S: Maintained +F: board/google/chromebook_coral/ +F: include/configs/chromebook_coral.h +F: configs/chromebook_coral_defconfig diff --git a/board/google/chromebook_coral/Makefile b/board/google/chromebook_coral/Makefile new file mode 100644 index 0000000000..6a27ce3da1 --- /dev/null +++ b/board/google/chromebook_coral/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright 2019 Google LLC + +obj-y += coral.o diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c new file mode 100644 index 0000000000..4e34710b97 --- /dev/null +++ b/board/google/chromebook_coral/coral.c @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 Google LLC + */ + +#include <common.h> + +int arch_misc_init(void) +{ + return 0; +} + +/* This function is needed if CONFIG_CMDLINE is not enabled */ +int board_run_command(const char *cmdline) +{ + printf("No command line\n"); + + return 0; +} diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index 3e5174ef8a..0483041187 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -51,7 +51,7 @@ int board_early_init_f(void) return 0; } -#if IS_ENABLED(CONFIG_DM_GPIO) +#if CONFIG_IS_ENABLED(DM_GPIO) static void board_gpio_init(void) { /* TODO */ |