diff options
Diffstat (limited to 'cpu/microblaze/disable_int.S')
| -rw-r--r-- | cpu/microblaze/disable_int.S | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/cpu/microblaze/disable_int.S b/cpu/microblaze/disable_int.S new file mode 100644 index 0000000000..aecd79513c --- /dev/null +++ b/cpu/microblaze/disable_int.S @@ -0,0 +1,46 @@ +/* + * (C) Copyright 2007 Michal Simek + * + * Michal SIMEK <monstr@monstr.eu> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + .text + .globl microblaze_disable_interrupts + .ent microblaze_disable_interrupts + .align 2 +microblaze_disable_interrupts: + #Make space on stack for a temporary + addi r1, r1, -4 + #Save register r12 + swi r12, r1, 0 + #Read the MSR register + mfs r12, rmsr + #Clear the interrupt enable bit + andi r12, r12, ~2 + #Save the MSR register + mts rmsr, r12 + #Load register r12 + lwi r12, r1, 0 + #Return + rtsd r15, 8 + #Update stack in the delay slot + addi r1, r1, 4 + .end microblaze_disable_interrupts |