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-rw-r--r--cpu/mips/Makefile15
-rw-r--r--cpu/mips/asc_serial.c3
-rw-r--r--cpu/mips/au1x00_eth.c12
-rw-r--r--cpu/mips/au1x00_serial.c4
-rw-r--r--cpu/mips/au1x00_usb_ohci.c2
-rw-r--r--cpu/mips/cache.S7
-rw-r--r--cpu/mips/incaip_wdt.S1
-rw-r--r--cpu/mips/start.S1
8 files changed, 17 insertions, 28 deletions
diff --git a/cpu/mips/Makefile b/cpu/mips/Makefile
index 92dcc167e8..5091781239 100644
--- a/cpu/mips/Makefile
+++ b/cpu/mips/Makefile
@@ -25,13 +25,16 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).a
-START = start.o
-COBJS = asc_serial.o au1x00_serial.o au1x00_eth.o au1x00_usb_ohci.o \
- cpu.o interrupts.o incaip_clock.o
-SOBJS = incaip_wdt.o cache.o
+SOBJS-y = cache.o
+COBJS-y = cpu.o interrupts.o
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+SOBJS-$(CONFIG_INCA_IP) += incaip_wdt.o
+COBJS-$(CONFIG_INCA_IP) += asc_serial.o incaip_clock.o
+COBJS-$(CONFIG_PURPLE) += asc_serial.o
+COBJS-$(CONFIG_SOC_AU1X00) += au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o
+
+SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
START := $(addprefix $(obj),$(START))
all: $(obj).depend $(START) $(LIB)
diff --git a/cpu/mips/asc_serial.c b/cpu/mips/asc_serial.c
index 3498b61e8b..be686c2ae8 100644
--- a/cpu/mips/asc_serial.c
+++ b/cpu/mips/asc_serial.c
@@ -4,8 +4,6 @@
#include <config.h>
-#if defined(CONFIG_PURPLE) || defined(CONFIG_INCA_IP)
-
#ifdef CONFIG_PURPLE
#define serial_init asc_serial_init
#define serial_putc asc_serial_putc
@@ -368,4 +366,3 @@ int serial_tstc (void)
return res;
}
-#endif /* CONFIG_PURPLE || CONFIG_INCA_IP */
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index d70c5fe987..d0cf8e0c1b 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -23,8 +23,6 @@
*/
#include <config.h>
-#ifdef CONFIG_AU1X00
-
#if defined(CFG_DISCOVER_PHY)
#error "PHY not supported yet"
/* We just assume that we are running 100FD for now */
@@ -33,20 +31,20 @@
/* I assume ethernet behaves like au1000 */
-#ifdef CONFIG_AU1000
+#ifdef CONFIG_SOC_AU1000
/* Base address differ between cpu:s */
#define ETH0_BASE AU1000_ETH0_BASE
#define MAC0_ENABLE AU1000_MAC0_ENABLE
#else
-#ifdef CONFIG_AU1100
+#ifdef CONFIG_SOC_AU1100
#define ETH0_BASE AU1100_ETH0_BASE
#define MAC0_ENABLE AU1100_MAC0_ENABLE
#else
-#ifdef CONFIG_AU1500
+#ifdef CONFIG_SOC_AU1500
#define ETH0_BASE AU1500_ETH0_BASE
#define MAC0_ENABLE AU1500_MAC0_ENABLE
#else
-#ifdef CONFIG_AU1550
+#ifdef CONFIG_SOC_AU1550
#define ETH0_BASE AU1550_ETH0_BASE
#define MAC0_ENABLE AU1550_MAC0_ENABLE
#else
@@ -307,5 +305,3 @@ int au1x00_enet_initialize(bd_t *bis){
return 1;
}
-
-#endif /* CONFIG_AU1X00 */
diff --git a/cpu/mips/au1x00_serial.c b/cpu/mips/au1x00_serial.c
index 42c668ee3d..63097940ac 100644
--- a/cpu/mips/au1x00_serial.c
+++ b/cpu/mips/au1x00_serial.c
@@ -26,9 +26,6 @@
*/
#include <config.h>
-
-#ifdef CONFIG_AU1X00
-
#include <common.h>
#include <asm/au1x00.h>
@@ -132,4 +129,3 @@ int serial_tstc (void)
}
return 0;
}
-#endif /* CONFIG_SERIAL_AU1X00 */
diff --git a/cpu/mips/au1x00_usb_ohci.c b/cpu/mips/au1x00_usb_ohci.c
index dbf72dc6f8..1ca8aafbbc 100644
--- a/cpu/mips/au1x00_usb_ohci.c
+++ b/cpu/mips/au1x00_usb_ohci.c
@@ -35,7 +35,7 @@
#include <config.h>
-#if defined(CONFIG_AU1X00) && defined(CONFIG_USB_OHCI)
+#ifdef CONFIG_USB_OHCI
/* #include <pci.h> no PCI on the AU1x00 */
diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index 1b0efc34a7..ee5d411e4b 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -23,7 +23,6 @@
*/
#include <config.h>
-#include <version.h>
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
@@ -41,7 +40,7 @@
*/
#define MIPS_MAX_CACHE_SIZE 0x10000
-#define INDEX_BASE KSEG0
+#define INDEX_BASE CKSEG0
.macro cache_op op addr
.set push
@@ -219,7 +218,7 @@ NESTED(mips_cache_reset, 0, ra)
/*
* Now clear that much memory starting from zero.
*/
- PTR_LI a0, KSEG1
+ PTR_LI a0, CKSEG1
PTR_ADDU a1, a0, v0
2: PTR_ADDIU a0, 64
f_fill64 a0, -64, zero
@@ -319,7 +318,7 @@ LEAF(dcache_enable)
.globl mips_cache_lock
.ent mips_cache_lock
mips_cache_lock:
- li a1, K0BASE - CACHE_LOCK_SIZE
+ li a1, CKSEG0 - CACHE_LOCK_SIZE
addu a0, a1
li a2, CACHE_LOCK_SIZE
li a3, CFG_CACHELINE_SIZE
diff --git a/cpu/mips/incaip_wdt.S b/cpu/mips/incaip_wdt.S
index 329386bd33..3ade3cd6fd 100644
--- a/cpu/mips/incaip_wdt.S
+++ b/cpu/mips/incaip_wdt.S
@@ -24,7 +24,6 @@
#include <config.h>
-#include <version.h>
#include <asm/regdef.h>
diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index d881879d77..09e4aab250 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -23,7 +23,6 @@
*/
#include <config.h>
-#include <version.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>