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Diffstat (limited to 'cpu/mpc86xx/cpu.c')
-rw-r--r--cpu/mpc86xx/cpu.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index 653a137396..d47cc5ef3a 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -182,26 +182,31 @@ watchdog_reset(void)
void
dma_init(void)
{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile ccsr_dma_t *dma = &immap->im_dma;
+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);
+ volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->satr0 = 0x00040000;
- dma->datr0 = 0x00040000;
+ dma->satr = 0x00040000;
+ dma->datr = 0x00040000;
+ dma->sr = 0xffffffff; /* clear any errors */
asm("sync; isync");
}
uint
dma_check(void)
{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile ccsr_dma_t *dma = &immap->im_dma;
- volatile uint status = dma->sr0;
+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);
+ volatile fsl_dma_t *dma = &dma_base->dma[0];
+ volatile uint status = dma->sr;
/* While the channel is busy, spin */
while ((status & 4) == 4) {
- status = dma->sr0;
+ status = dma->sr;
}
+ /* clear MR[CS] channel start bit */
+ dma->mr &= 0x00000001;
+ asm("sync;isync");
+
if (status != 0) {
printf("DMA Error: status = %x\n", status);
}
@@ -211,15 +216,15 @@ dma_check(void)
int
dma_xfer(void *dest, uint count, void *src)
{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile ccsr_dma_t *dma = &immap->im_dma;
+ volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);
+ volatile fsl_dma_t *dma = &dma_base->dma[0];
- dma->dar0 = (uint) dest;
- dma->sar0 = (uint) src;
- dma->bcr0 = count;
- dma->mr0 = 0xf000004;
+ dma->dar = (uint) dest;
+ dma->sar = (uint) src;
+ dma->bcr = count;
+ dma->mr = 0xf000004;
asm("sync;isync");
- dma->mr0 = 0xf000005;
+ dma->mr = 0xf000005;
asm("sync;isync");
return dma_check();
}