summaryrefslogtreecommitdiff
path: root/cpu
diff options
context:
space:
mode:
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc85xx/release.S12
-rw-r--r--cpu/mpc85xx/tlb.c4
-rw-r--r--cpu/mpc8xxx/ddr/options.c7
-rw-r--r--cpu/ppc4xx/44x_spd_ddr2.c2
4 files changed, 14 insertions, 11 deletions
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index a1ae78a7f5..433ff02544 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -102,18 +102,22 @@ __secondary_start_page:
#ifdef CONFIG_BACKSIDE_L2_CACHE
/* Enable/invalidate the L2 cache */
msync
- lis r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@h
- ori r3,r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@l
- mtspr SPRN_L2CSR0,r3
+ lis r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@h
+ ori r2,r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@l
+ mtspr SPRN_L2CSR0,r2
1:
mfspr r3,SPRN_L2CSR0
- andis. r1,r3,L2CSR0_L2FI@h
+ and. r1,r3,r2
bne 1b
lis r3,CONFIG_SYS_INIT_L2CSR0@h
ori r3,r3,CONFIG_SYS_INIT_L2CSR0@l
mtspr SPRN_L2CSR0,r3
isync
+2:
+ mfspr r3,SPRN_L2CSR0
+ andis. r1,r3,L2CSR0_L2E@h
+ beq 2b
#endif
#define EPAPR_MAGIC (0x45504150)
diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c
index 6e94c237ad..ea5deb2971 100644
--- a/cpu/mpc85xx/tlb.c
+++ b/cpu/mpc85xx/tlb.c
@@ -132,10 +132,10 @@ int find_tlb_idx(void *addr, u8 tlbsel)
void init_addr_map(void)
{
int i;
- unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
+ unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
/* walk all the entries */
- for (i = 0; i < max_cam; i++) {
+ for (i = 0; i < num_cam; i++) {
unsigned long epn;
u32 tsize, _mas1;
phys_addr_t rpn;
diff --git a/cpu/mpc8xxx/ddr/options.c b/cpu/mpc8xxx/ddr/options.c
index db442918e9..2e030c11a3 100644
--- a/cpu/mpc8xxx/ddr/options.c
+++ b/cpu/mpc8xxx/ddr/options.c
@@ -22,9 +22,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
unsigned int ctrl_num)
{
unsigned int i;
-#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
const char *p;
-#endif
/* Chip select options. */
@@ -242,8 +240,10 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
simple_strtoul(p, NULL, 0);
}
}
+#endif
- if( (p = getenv("ba_intlv_ctl")) != NULL) {
+ if( ((p = getenv("ba_intlv_ctl")) != NULL) &&
+ (CONFIG_CHIP_SELECTS_PER_CTRL > 1)) {
if (strcmp(p, "cs0_cs1") == 0)
popts->ba_intlv_ctl = FSL_DDR_CS0_CS1;
else if (strcmp(p, "cs2_cs3") == 0)
@@ -283,7 +283,6 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
break;
}
}
-#endif
fsl_ddr_board_options(popts, pdimm, ctrl_num);
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index 3975306400..f8aa14aadb 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -3160,7 +3160,7 @@ inline void ppc4xx_ibm_ddr2_register_dump(void)
PPC4xx_IBM_DDR2_DUMP_REGISTER(SDTR3);
PPC4xx_IBM_DDR2_DUMP_REGISTER(MMODE);
PPC4xx_IBM_DDR2_DUMP_REGISTER(MEMODE);
- PPC4xx_IBM_DDR2_DUMP_REGISTER(ECCCR);
+ PPC4xx_IBM_DDR2_DUMP_REGISTER(ECCES);
#if (defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT))
PPC4xx_IBM_DDR2_DUMP_REGISTER(CID);