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-rw-r--r--doc/README.mpc8641hpcn40
1 files changed, 21 insertions, 19 deletions
diff --git a/doc/README.mpc8641hpcn b/doc/README.mpc8641hpcn
index 2c3c7034e2..0a6e715bc2 100644
--- a/doc/README.mpc8641hpcn
+++ b/doc/README.mpc8641hpcn
@@ -79,51 +79,53 @@ Switches:
3. Flash U-Boot
---------------
-The flash range 0xFF800000 to 0xFFFFFFFF can be divided into 2 halves.
+The flash range 0xEF800000 to 0xEFFFFFFF can be divided into 2 halves.
It is possible to use either half to boot using u-boot. Switch 5 bit 2
is used for this purpose.
-0xFF800000 to 0xFFBFFFFF - 4MB
-0xFFC00000 to 0xFFFFFFFF - 4MB
-When this bit is 0, U-Boot is at 0xFFF00000.
-When this bit is 1, U-Boot is at 0xFFB00000.
+0xEF800000 to 0xEFBFFFFF - 4MB
+0xEFC00000 to 0xEFFFFFFF - 4MB
+When this bit is 0, U-Boot is at 0xEFF00000.
+When this bit is 1, U-Boot is at 0xEFB00000.
Use the above mentioned flash commands to program the other half, and
use switch 5, bit 2 to alternate between the halves. Note: The booting
-version of U-Boot will always be at 0xFFF00000.
+version of U-Boot will always be at 0xEFF00000.
-To Flash U-Boot into the booting bank (0xFFC00000 - 0xFFFFFFFF):
+To Flash U-Boot into the booting bank (0xEFC00000 - 0xEFFFFFFF):
tftp 1000000 u-boot.bin
protect off all
- erase fff00000 +$filesize
- cp.b 1000000 fff00000 $filesize
+ erase eff00000 +$filesize
+ cp.b 1000000 eff00000 $filesize
or use tftpflash command:
run tftpflash
-To Flash U-boot into the alternative bank (0xFF800000 - 0xFFBFFFFF):
+To Flash U-boot into the alternative bank (0xEF800000 - 0xEFBFFFFF):
tftp 1000000 u-boot.bin
- erase ffb00000 +$filesize
- cp.b 1000000 ffb00000 $filesize
+ erase efb00000 +$filesize
+ cp.b 1000000 efb00000 $filesize
4. Memory Map
-------------
+NOTE: RIO and PCI are mutually exclusive, so they share an address
Memory Range Device Size
------------ ------ ----
0x0000_0000 0x7fff_ffff DDR 2G
+ 0x8000_0000 0x9fff_ffff RIO MEM 512M
0x8000_0000 0x9fff_ffff PCI1/PEX1 MEM 512M
- 0xa000_0000 0xafff_ffff PCI2/PEX2 MEM 512M
- 0xf800_0000 0xf80f_ffff CCSR 1M
- 0xf810_0000 0xf81f_ffff PIXIS 1M
+ 0xa000_0000 0xbfff_ffff PCI2/PEX2 MEM 512M
+ 0xffe0_0000 0xffef_ffff CCSR 1M
+ 0xffdf_0000 0xffdf_7fff PIXIS 8K
+ 0xffdf_8000 0xffdf_ffff CF 8K
0xf840_0000 0xf840_3fff Stack space 32K
- 0xe200_0000 0xe2ff_ffff PCI1/PEX1 IO 16M
- 0xe300_0000 0xe3ff_ffff PCI2/PEX2 IO 16M
- 0xfe00_0000 0xfeff_ffff Flash(alternate)16M
- 0xff00_0000 0xffff_ffff Flash(boot bank)16M
+ 0xffc0_0000 0xffc0_ffff PCI1/PEX1 IO 64K
+ 0xffc1_0000 0xffc1_ffff PCI2/PEX2 IO 64K
+ 0xef80_0000 0xefff_ffff Flash 8M
5. pixis_reset command
--------------------