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path: root/drivers/ddr/marvell/a38x
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Diffstat (limited to 'drivers/ddr/marvell/a38x')
-rw-r--r--drivers/ddr/marvell/a38x/ddr3_training_db.c8
-rw-r--r--drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c3
2 files changed, 6 insertions, 5 deletions
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_db.c b/drivers/ddr/marvell/a38x/ddr3_training_db.c
index 111a8586c6..b2f11a8399 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_db.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_db.c
@@ -420,13 +420,13 @@ unsigned int mv_ddr_speed_bin_timing_get(enum mv_ddr_speed_bin index, enum mv_dd
result = speed_bin_table_t_rcd_t_rp[index];
break;
case SPEED_BIN_TRAS:
- if (index < SPEED_BIN_DDR_1066G)
+ if (index <= SPEED_BIN_DDR_1066G)
result = 37500;
- else if (index < SPEED_BIN_DDR_1333J)
+ else if (index <= SPEED_BIN_DDR_1333J)
result = 36000;
- else if (index < SPEED_BIN_DDR_1600K)
+ else if (index <= SPEED_BIN_DDR_1600K)
result = 35000;
- else if (index < SPEED_BIN_DDR_1866M)
+ else if (index <= SPEED_BIN_DDR_1866M)
result = 34000;
else
result = 33000;
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c b/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c
index db0f8ad7fb..df832ac6dc 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c
@@ -50,6 +50,7 @@ int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id)
int max_phase = MIN_VALUE, current_phase;
enum hws_access_type access_type = ACCESS_TYPE_UNICAST;
u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE);
+ unsigned int max_cs = mv_ddr_cs_num_get();
CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
DUNIT_ODT_CTRL_REG,
@@ -59,7 +60,7 @@ int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id)
data_read, MASK_ALL_BITS));
val = data_read[if_id];
- for (cs_num = 0; cs_num < MAX_CS_NUM; cs_num++) {
+ for (cs_num = 0; cs_num < max_cs; cs_num++) {
read_sample[cs_num] = GET_RD_SAMPLE_DELAY(val, cs_num);
/* find maximum of read_samples */