diff options
Diffstat (limited to 'drivers/mtd/spi/sf_internal.h')
| -rw-r--r-- | drivers/mtd/spi/sf_internal.h | 72 |
1 files changed, 38 insertions, 34 deletions
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cde4cfbf2e..2463686617 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -23,6 +23,7 @@ enum spi_dual_flash { enum spi_nor_option_flags { SNOR_F_SST_WR = BIT(0), SNOR_F_USE_FSR = BIT(1), + SNOR_F_USE_UPAGE = BIT(3), }; #define SPI_FLASH_3B_ADDR_LEN 3 @@ -98,42 +99,45 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, const void *buf); #endif -#ifdef CONFIG_SPI_FLASH_SPANSION -/* Used for Spansion S25FS-S family flash only. */ -#define CMD_SPANSION_RDAR 0x65 /* Read any device register */ -#define CMD_SPANSION_WRAR 0x71 /* Write any device register */ -#endif -/** - * struct spi_flash_params - SPI/QSPI flash device params structure - * - * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) - * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) - * @ext_jedec: Device ext_jedec ID - * @sector_size: Isn't necessarily a sector size from vendor, - * the size listed here is what works with CMD_ERASE_64K - * @nr_sectors: No.of sectors on this device - * @flags: Important param, for flash specific behaviour - */ -struct spi_flash_params { - const char *name; - u32 jedec; - u16 ext_jedec; - u32 sector_size; - u32 nr_sectors; - - u16 flags; -#define SECT_4K BIT(0) -#define E_FSR BIT(1) -#define SST_WR BIT(2) -#define WR_QPP BIT(3) -#define RD_QUAD BIT(4) -#define RD_DUAL BIT(5) -#define RD_QUADIO BIT(6) -#define RD_DUALIO BIT(7) +#define JEDEC_MFR(info) ((info)->id[0]) +#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) +#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) +#define SPI_FLASH_MAX_ID_LEN 6 + +struct spi_flash_info { + /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ + const char *name; + + /* + * This array stores the ID bytes. + * The first three bytes are the JEDIC ID. + * JEDEC ID zero means "no ID" (mostly older chips). + */ + u8 id[SPI_FLASH_MAX_ID_LEN]; + u8 id_len; + + /* + * The size listed here is what works with SPINOR_OP_SE, which isn't + * necessarily called a "sector" by the vendor. + */ + u32 sector_size; + u32 n_sectors; + + u16 page_size; + + u16 flags; +#define SECT_4K BIT(0) /* CMD_ERASE_4K works uniformly */ +#define E_FSR BIT(1) /* use flag status register for */ +#define SST_WR BIT(2) /* use SST byte/word programming */ +#define WR_QPP BIT(3) /* use Quad Page Program */ +#define RD_QUAD BIT(4) /* use Quad Read */ +#define RD_DUAL BIT(5) /* use Dual Read */ +#define RD_QUADIO BIT(6) /* use Quad IO Read */ +#define RD_DUALIO BIT(7) /* use Dual IO Read */ #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) }; -extern const struct spi_flash_params spi_flash_params_table[]; +extern const struct spi_flash_info spi_flash_ids[]; /* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); @@ -182,7 +186,7 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) * - SPI claim * - spi_flash_cmd_write_enable * - spi_flash_cmd_write - * - spi_flash_cmd_wait_ready + * - spi_flash_wait_till_ready * - SPI release */ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, |