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path: root/drivers/pinctrl/rockchip/pinctrl-rk3399.c
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Diffstat (limited to 'drivers/pinctrl/rockchip/pinctrl-rk3399.c')
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3399.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 06276b14ef..9e8dc2ef82 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -50,6 +50,39 @@ static struct rockchip_mux_route_data rk3399_mux_route_data[] = {
},
};
+static int rk3399_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+ struct rockchip_pinctrl_priv *priv = bank->priv;
+ int iomux_num = (pin / 8);
+ struct regmap *regmap;
+ int reg, ret, mask, mux_type;
+ u8 bit;
+ u32 data, route_reg, route_val;
+
+ regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+ ? priv->regmap_pmu : priv->regmap_base;
+
+ /* get basic quadrupel of mux registers and the correct reg inside */
+ mux_type = bank->iomux[iomux_num].type;
+ reg = bank->iomux[iomux_num].offset;
+ reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask);
+
+ if (bank->route_mask & BIT(pin)) {
+ if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+ &route_val)) {
+ ret = regmap_write(regmap, route_reg, route_val);
+ if (ret)
+ return ret;
+ }
+ }
+
+ data = (mask << (bit + 16));
+ data |= (mux & mask) << bit;
+ ret = regmap_write(regmap, reg, data);
+
+ return ret;
+}
+
#define RK3399_PULL_GRF_OFFSET 0xe040
#define RK3399_PULL_PMU_OFFSET 0x40
@@ -168,6 +201,7 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
.pmu_drv_offset = 0x80,
.iomux_routes = rk3399_mux_route_data,
.niomux_routes = ARRAY_SIZE(rk3399_mux_route_data),
+ .set_mux = rk3399_set_mux,
.pull_calc_reg = rk3399_calc_pull_reg_and_bit,
.drv_calc_reg = rk3399_calc_drv_reg_and_bit,
};