diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/ddr/altera/sdram_gen5.c | 2 | ||||
-rw-r--r-- | drivers/spi/cadence_qspi.c | 21 | ||||
-rw-r--r-- | drivers/spi/cadence_qspi.h | 1 | ||||
-rw-r--r-- | drivers/timer/dw-apb-timer.c | 18 |
4 files changed, 38 insertions, 4 deletions
diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c index fcd89b619d..8c8ea19eb9 100644 --- a/drivers/ddr/altera/sdram_gen5.c +++ b/drivers/ddr/altera/sdram_gen5.c @@ -626,7 +626,7 @@ static int altera_gen5_sdram_get_info(struct udevice *dev, return 0; } -static struct ram_ops altera_gen5_sdram_ops = { +static const struct ram_ops altera_gen5_sdram_ops = { .get_info = altera_gen5_sdram_get_info, }; diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index e2e54cd277..8fd23a7702 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clk.h> #include <dm.h> #include <fdtdec.h> #include <malloc.h> @@ -24,10 +25,10 @@ static int cadence_spi_write_speed(struct udevice *bus, uint hz) struct cadence_spi_priv *priv = dev_get_priv(bus); cadence_qspi_apb_config_baudrate_div(priv->regbase, - CONFIG_CQSPI_REF_CLK, hz); + plat->ref_clk_hz, hz); /* Reconfigure delay timing if speed is changed. */ - cadence_qspi_apb_delay(priv->regbase, CONFIG_CQSPI_REF_CLK, hz, + cadence_qspi_apb_delay(priv->regbase, plat->ref_clk_hz, hz, plat->tshsl_ns, plat->tsd2d_ns, plat->tchsh_ns, plat->tslch_ns); @@ -294,6 +295,8 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) { struct cadence_spi_platdata *plat = bus->platdata; ofnode subnode; + struct clk clk; + int ret; plat->regbase = (void *)devfdt_get_addr_index(bus, 0); plat->ahbbase = (void *)devfdt_get_addr_index(bus, 1); @@ -325,6 +328,20 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) plat->tchsh_ns = ofnode_read_u32_default(subnode, "cdns,tchsh-ns", 20); plat->tslch_ns = ofnode_read_u32_default(subnode, "cdns,tslch-ns", 20); + ret = clk_get_by_index(bus, 0, &clk); + if (ret) { +#ifdef CONFIG_CQSPI_REF_CLK + plat->ref_clk_hz = CONFIG_CQSPI_REF_CLK; +#else + return ret; +#endif + } else { + plat->ref_clk_hz = clk_get_rate(&clk); + clk_free(&clk); + if (IS_ERR_VALUE(plat->ref_clk_hz)) + return plat->ref_clk_hz; + } + debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n", __func__, plat->regbase, plat->ahbbase, plat->max_hz, plat->page_size); diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 20cceca239..99dee75bbd 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -16,6 +16,7 @@ #define CQSPI_READ_CAPTURE_MAX_DELAY 16 struct cadence_spi_platdata { + unsigned int ref_clk_hz; unsigned int max_hz; void *regbase; void *ahbbase; diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c index 86312b8dc7..fad22be8c9 100644 --- a/drivers/timer/dw-apb-timer.c +++ b/drivers/timer/dw-apb-timer.c @@ -8,6 +8,7 @@ #include <common.h> #include <dm.h> #include <clk.h> +#include <reset.h> #include <timer.h> #include <asm/io.h> @@ -18,7 +19,8 @@ #define DW_APB_CTRL 0x8 struct dw_apb_timer_priv { - fdt_addr_t regs; + fdt_addr_t regs; + struct reset_ctl_bulk resets; }; static int dw_apb_timer_get_count(struct udevice *dev, u64 *count) @@ -42,6 +44,12 @@ static int dw_apb_timer_probe(struct udevice *dev) struct clk clk; int ret; + ret = reset_get_bulk(dev, &priv->resets); + if (ret) + dev_warn(dev, "Can't get reset: %d\n", ret); + else + reset_deassert_bulk(&priv->resets); + ret = clk_get_by_index(dev, 0, &clk); if (ret) return ret; @@ -67,6 +75,13 @@ static int dw_apb_timer_ofdata_to_platdata(struct udevice *dev) return 0; } +static int dw_apb_timer_remove(struct udevice *dev) +{ + struct dw_apb_timer_priv *priv = dev_get_priv(dev); + + return reset_release_bulk(&priv->resets); +} + static const struct timer_ops dw_apb_timer_ops = { .get_count = dw_apb_timer_get_count, }; @@ -83,5 +98,6 @@ U_BOOT_DRIVER(dw_apb_timer) = { .probe = dw_apb_timer_probe, .of_match = dw_apb_timer_ids, .ofdata_to_platdata = dw_apb_timer_ofdata_to_platdata, + .remove = dw_apb_timer_remove, .priv_auto_alloc_size = sizeof(struct dw_apb_timer_priv), }; |