summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/block/sata_ceva.c1
-rw-r--r--drivers/fpga/zynqmppl.c25
-rw-r--r--drivers/mtd/spi/Kconfig7
3 files changed, 15 insertions, 18 deletions
diff --git a/drivers/block/sata_ceva.c b/drivers/block/sata_ceva.c
index 65a4bb2099..0c24fce8dc 100644
--- a/drivers/block/sata_ceva.c
+++ b/drivers/block/sata_ceva.c
@@ -6,7 +6,6 @@
*/
#include <common.h>
#include <dm.h>
-#include <netdev.h>
#include <ahci.h>
#include <scsi.h>
#include <asm/arch/hardware.h>
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 23039c3eb2..57a4e6c88e 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -10,6 +10,7 @@
#include <common.h>
#include <zynqmppl.h>
#include <linux/sizes.h>
+#include <asm/arch/sys_proto.h>
#define DUMMY_WORD 0xffffffff
@@ -191,25 +192,14 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,
return 0;
}
-static int invoke_smc(ulong id, ulong reg0, ulong reg1, ulong reg2)
-{
- struct pt_regs regs;
- regs.regs[0] = id;
- regs.regs[1] = reg0;
- regs.regs[2] = reg1;
- regs.regs[3] = reg2;
-
- smc_call(&regs);
-
- return regs.regs[0];
-}
-
static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
bitstream_type bstype)
{
u32 swap;
- ulong bin_buf, flags;
+ ulong bin_buf;
int ret;
+ u32 buf_lo, buf_hi;
+ u32 ret_payload[PAYLOAD_ARG_CNT];
if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
return FPGA_FAIL;
@@ -224,9 +214,10 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
else
bsize = bsize / 4;
- flags = (u32)bsize | ((u64)bstype << 32);
-
- ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, bin_buf, flags, 0);
+ buf_lo = (u32)bin_buf;
+ buf_hi = upper_32_bits(bin_buf);
+ ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi, bsize,
+ bstype, ret_payload);
if (ret)
debug("PL FPGA LOAD fail\n");
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 5ca0a712d8..5700859ff2 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -42,6 +42,13 @@ config SPI_FLASH_BAR
Bank/Extended address registers are used to access the flash
which has size > 16MiB in 3-byte addressing.
+config SF_DUAL_FLASH
+ bool "SPI DUAL flash memory support"
+ depends on SPI_FLASH
+ help
+ Enable this option to support two flash memories connected to a single
+ controller. Currently Xilinx Zynq qspi supports this.
+
if SPI_FLASH
config SPI_FLASH_ATMEL