diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mtd/nand/Makefile | 1 | ||||
| -rw-r--r-- | drivers/mtd/nand/s3c64xx.c | 295 | ||||
| -rw-r--r-- | drivers/mtd/onenand/onenand_base.c | 4 | ||||
| -rw-r--r-- | drivers/mtd/onenand/samsung.c | 60 | ||||
| -rw-r--r-- | drivers/serial/Makefile | 1 | ||||
| -rw-r--r-- | drivers/serial/s3c64xx.c | 187 | ||||
| -rw-r--r-- | drivers/serial/serial.c | 2 | ||||
| -rw-r--r-- | drivers/usb/host/Makefile | 1 | ||||
| -rw-r--r-- | drivers/usb/host/ohci-hcd.c | 1 | ||||
| -rw-r--r-- | drivers/usb/host/s3c64xx-hcd.c | 45 |
10 files changed, 4 insertions, 593 deletions
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index bcb71619b5..35769c5ea3 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -73,7 +73,6 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o COBJS-$(CONFIG_NAND_NDFC) += ndfc.o COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o -COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o COBJS-$(CONFIG_TEGRA_NAND) += tegra_nand.o COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c deleted file mode 100644 index 87f0341066..0000000000 --- a/drivers/mtd/nand/s3c64xx.c +++ /dev/null @@ -1,295 +0,0 @@ -/* - * (C) Copyright 2006 DENX Software Engineering - * - * Implementation for U-Boot 1.1.6 by Samsung - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -#include <nand.h> -#include <linux/mtd/nand.h> - -#include <asm/arch/s3c6400.h> - -#include <asm/io.h> -#include <asm/errno.h> - -#define MAX_CHIPS 2 -static int nand_cs[MAX_CHIPS] = {0, 1}; - -#ifdef CONFIG_NAND_SPL -#define printf(arg...) do {} while (0) -#endif - -/* Nand flash definition values by jsgood */ -#ifdef S3C_NAND_DEBUG -/* - * Function to print out oob buffer for debugging - * Written by jsgood - */ -static void print_oob(const char *header, struct mtd_info *mtd) -{ - int i; - struct nand_chip *chip = mtd->priv; - - printf("%s:\t", header); - - for (i = 0; i < 64; i++) - printf("%02x ", chip->oob_poi[i]); - - printf("\n"); -} -#endif /* S3C_NAND_DEBUG */ - -static void s3c_nand_select_chip(struct mtd_info *mtd, int chip) -{ - int ctrl = readl(NFCONT); - - switch (chip) { - case -1: - ctrl |= 6; - break; - case 0: - ctrl &= ~2; - break; - case 1: - ctrl &= ~4; - break; - default: - return; - } - - writel(ctrl, NFCONT); -} - -/* - * Hardware specific access to control-lines function - * Written by jsgood - */ -static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *this = mtd->priv; - - if (ctrl & NAND_CTRL_CHANGE) { - if (ctrl & NAND_CLE) - this->IO_ADDR_W = (void __iomem *)NFCMMD; - else if (ctrl & NAND_ALE) - this->IO_ADDR_W = (void __iomem *)NFADDR; - else - this->IO_ADDR_W = (void __iomem *)NFDATA; - if (ctrl & NAND_NCE) - s3c_nand_select_chip(mtd, *(int *)this->priv); - else - s3c_nand_select_chip(mtd, -1); - } - - if (cmd != NAND_CMD_NONE) - writeb(cmd, this->IO_ADDR_W); -} - -/* - * Function for checking device ready pin - * Written by jsgood - */ -static int s3c_nand_device_ready(struct mtd_info *mtdinfo) -{ - return !!(readl(NFSTAT) & NFSTAT_RnB); -} - -#ifdef CONFIG_SYS_S3C_NAND_HWECC -/* - * This function is called before encoding ecc codes to ready ecc engine. - * Written by jsgood - */ -static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode) -{ - u_long nfcont, nfconf; - - /* - * The original driver used 4-bit ECC for "new" MLC chips, i.e., for - * those with non-zero ID[3][3:2], which anyway only holds for ST - * (Numonyx) chips - */ - nfconf = readl(NFCONF) & ~NFCONF_ECC_4BIT; - - writel(nfconf, NFCONF); - - /* Initialize & unlock */ - nfcont = readl(NFCONT); - nfcont |= NFCONT_INITECC; - nfcont &= ~NFCONT_MECCLOCK; - - if (mode == NAND_ECC_WRITE) - nfcont |= NFCONT_ECC_ENC; - else if (mode == NAND_ECC_READ) - nfcont &= ~NFCONT_ECC_ENC; - - writel(nfcont, NFCONT); -} - -/* - * This function is called immediately after encoding ecc codes. - * This function returns encoded ecc codes. - * Written by jsgood - */ -static int s3c_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, - u_char *ecc_code) -{ - u_long nfcont, nfmecc0; - - /* Lock */ - nfcont = readl(NFCONT); - nfcont |= NFCONT_MECCLOCK; - writel(nfcont, NFCONT); - - nfmecc0 = readl(NFMECC0); - - ecc_code[0] = nfmecc0 & 0xff; - ecc_code[1] = (nfmecc0 >> 8) & 0xff; - ecc_code[2] = (nfmecc0 >> 16) & 0xff; - ecc_code[3] = (nfmecc0 >> 24) & 0xff; - - return 0; -} - -/* - * This function determines whether read data is good or not. - * If SLC, must write ecc codes to controller before reading status bit. - * If MLC, status bit is already set, so only reading is needed. - * If status bit is good, return 0. - * If correctable errors occured, do that. - * If uncorrectable errors occured, return -1. - * Written by jsgood - */ -static int s3c_nand_correct_data(struct mtd_info *mtd, u_char *dat, - u_char *read_ecc, u_char *calc_ecc) -{ - int ret = -1; - u_long nfestat0, nfmeccdata0, nfmeccdata1, err_byte_addr; - u_char err_type, repaired; - - /* SLC: Write ecc to compare */ - nfmeccdata0 = (calc_ecc[1] << 16) | calc_ecc[0]; - nfmeccdata1 = (calc_ecc[3] << 16) | calc_ecc[2]; - writel(nfmeccdata0, NFMECCDATA0); - writel(nfmeccdata1, NFMECCDATA1); - - /* Read ecc status */ - nfestat0 = readl(NFESTAT0); - err_type = nfestat0 & 0x3; - - switch (err_type) { - case 0: /* No error */ - ret = 0; - break; - - case 1: - /* - * 1 bit error (Correctable) - * (nfestat0 >> 7) & 0x7ff :error byte number - * (nfestat0 >> 4) & 0x7 :error bit number - */ - err_byte_addr = (nfestat0 >> 7) & 0x7ff; - repaired = dat[err_byte_addr] ^ (1 << ((nfestat0 >> 4) & 0x7)); - - printf("S3C NAND: 1 bit error detected at byte %ld. " - "Correcting from 0x%02x to 0x%02x...OK\n", - err_byte_addr, dat[err_byte_addr], repaired); - - dat[err_byte_addr] = repaired; - - ret = 1; - break; - - case 2: /* Multiple error */ - case 3: /* ECC area error */ - printf("S3C NAND: ECC uncorrectable error detected. " - "Not correctable.\n"); - ret = -1; - break; - } - - return ret; -} -#endif /* CONFIG_SYS_S3C_NAND_HWECC */ - -/* - * Board-specific NAND initialization. The following members of the - * argument are board-specific (per include/linux/mtd/nand.h): - * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device - * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device - * - hwcontrol: hardwarespecific function for accesing control-lines - * - dev_ready: hardwarespecific function for accesing device ready/busy line - * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must - * only be provided if a hardware ECC is available - * - eccmode: mode of ecc, see defines - * - chip_delay: chip dependent delay for transfering data from array to - * read regs (tR) - * - options: various chip options. They can partly be set to inform - * nand_scan about special functionality. See the defines for further - * explanation - * Members with a "?" were not set in the merged testing-NAND branch, - * so they are not set here either. - */ -int board_nand_init(struct nand_chip *nand) -{ - static int chip_n; - - if (chip_n >= MAX_CHIPS) - return -ENODEV; - - NFCONT_REG = (NFCONT_REG & ~NFCONT_WP) | NFCONT_ENABLE | 0x6; - - nand->IO_ADDR_R = (void __iomem *)NFDATA; - nand->IO_ADDR_W = (void __iomem *)NFDATA; - nand->cmd_ctrl = s3c_nand_hwcontrol; - nand->dev_ready = s3c_nand_device_ready; - nand->select_chip = s3c_nand_select_chip; - nand->options = 0; -#ifdef CONFIG_NAND_SPL - nand->read_byte = nand_read_byte; - nand->write_buf = nand_write_buf; - nand->read_buf = nand_read_buf; -#endif - -#ifdef CONFIG_SYS_S3C_NAND_HWECC - nand->ecc.hwctl = s3c_nand_enable_hwecc; - nand->ecc.calculate = s3c_nand_calculate_ecc; - nand->ecc.correct = s3c_nand_correct_data; - - /* - * If you get more than 1 NAND-chip with different page-sizes on the - * board one day, it will get more complicated... - */ - nand->ecc.mode = NAND_ECC_HW; - nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE; - nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES; -#else - nand->ecc.mode = NAND_ECC_SOFT; -#endif /* ! CONFIG_SYS_S3C_NAND_HWECC */ - - nand->priv = nand_cs + chip_n++; - - return 0; -} diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 1a7b40eaa3..858e322743 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -632,10 +632,6 @@ static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) int blockpage, found = 0; unsigned int i; -#ifdef CONFIG_S3C64XX - return 0; -#endif - if (ONENAND_IS_2PLANE(this)) blockpage = onenand_get_2x_blockpage(mtd, addr); else diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c index 0d94ea5b1f..5eb2b3a424 100644 --- a/drivers/mtd/onenand/samsung.c +++ b/drivers/mtd/onenand/samsung.c @@ -1,5 +1,5 @@ /* - * S3C64XX/S5PC100 OneNAND driver at U-Boot + * S5PC100 OneNAND driver at U-Boot * * Copyright (C) 2008-2009 Samsung Electronics * Kyungmin Park <kyungmin.park@samsung.com> @@ -62,12 +62,7 @@ do { \ #define ONENAND_MAIN_SPARE_ACCESS 0x16 #define ONENAND_PIPELINE_READ 0x4000 -#if defined(CONFIG_S3C64XX) -#define MAP_00 (0x0 << 24) -#define MAP_01 (0x1 << 24) -#define MAP_10 (0x2 << 24) -#define MAP_11 (0x3 << 24) -#elif defined(CONFIG_S5P) +#if defined(CONFIG_S5P) #define MAP_00 (0x0 << 26) #define MAP_01 (0x1 << 26) #define MAP_10 (0x2 << 26) @@ -116,12 +111,7 @@ static void s3c_write_cmd(int value, unsigned int cmd) * return the buffer address on the memory device * It will be combined with CMD_MAP_XX */ -#if defined(CONFIG_S3C64XX) -static unsigned int s3c_mem_addr(int fba, int fpa, int fsa) -{ - return (fba << 12) | (fpa << 6) | (fsa << 4); -} -#elif defined(CONFIG_S5P) +#if defined(CONFIG_S5P) static unsigned int s3c_mem_addr(int fba, int fpa, int fsa) { return (fba << 13) | (fpa << 7) | (fsa << 5); @@ -550,45 +540,6 @@ static void s3c_onenand_unlock_all(struct mtd_info *mtd) s3c_onenand_check_lock_status(mtd); } -#ifdef CONFIG_S3C64XX -static void s3c_set_width_regs(struct onenand_chip *this) -{ - int dev_id, density; - int fba, fpa, fsa; - int dbs_dfs; - - dev_id = DEVICE_ID0_REG; - - density = (dev_id >> ONENAND_DEVICE_DENSITY_SHIFT) & 0xf; - dbs_dfs = !!(dev_id & ONENAND_DEVICE_IS_DDP); - - fba = density + 7; - if (dbs_dfs) - fba--; /* Decrease the fba */ - fpa = 6; - if (density >= ONENAND_DEVICE_DENSITY_512Mb) - fsa = 2; - else - fsa = 1; - - DPRINTK("FBA %lu, FPA %lu, FSA %lu, DDP %lu", - FBA_WIDTH0_REG, FPA_WIDTH0_REG, FSA_WIDTH0_REG, - DDP_DEVICE_REG); - - DPRINTK("mem_cfg0 0x%lx, sync mode %lu, " - "dev_page_size %lu, BURST LEN %lu", - MEM_CFG0_REG, SYNC_MODE_REG, - DEV_PAGE_SIZE_REG, BURST_LEN0_REG); - - DEV_PAGE_SIZE_REG = 0x1; - - FBA_WIDTH0_REG = fba; - FPA_WIDTH0_REG = fpa; - FSA_WIDTH0_REG = fsa; - DBS_DFS_WIDTH0_REG = dbs_dfs; -} -#endif - int s5pc110_chip_probe(struct mtd_info *mtd) { return 0; @@ -620,10 +571,7 @@ void s3c_onenand_init(struct mtd_info *mtd) onenand->mtd = mtd; -#if defined(CONFIG_S3C64XX) - onenand->base = (void *)0x70100000; - onenand->ahb_addr = (void *)0x20000000; -#elif defined(CONFIG_S5P) +#if defined(CONFIG_S5P) onenand->base = (void *)0xE7100000; onenand->ahb_addr = (void *)0xB0000000; #endif diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index de3f471996..fbc4e97e98 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -35,7 +35,6 @@ COBJS-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o COBJS-$(CONFIG_MCFUART) += mcfuart.o COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o COBJS-$(CONFIG_SYS_NS16550) += ns16550.o -COBJS-$(CONFIG_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_S5P) += serial_s5p.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c deleted file mode 100644 index b590992dc8..0000000000 --- a/drivers/serial/s3c64xx.c +++ /dev/null @@ -1,187 +0,0 @@ -/* - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> - * - * (C) Copyright 2008 - * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#include <common.h> -#include <linux/compiler.h> -#include <serial.h> -#include <asm/arch/s3c6400.h> - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_SERIAL1 -#define UART_NR S3C64XX_UART0 - -#elif defined(CONFIG_SERIAL2) -#define UART_NR S3C64XX_UART1 - -#elif defined(CONFIG_SERIAL3) -#define UART_NR S3C64XX_UART2 - -#else -#error "Bad: you didn't configure serial ..." -#endif - -/* - * The coefficient, used to calculate the baudrate on S3C6400 UARTs is - * calculated as - * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT - * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1, - * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants: - */ -static const int udivslot[] = { - 0, - 0x0080, - 0x0808, - 0x0888, - 0x2222, - 0x4924, - 0x4a52, - 0x54aa, - 0x5555, - 0xd555, - 0xd5d5, - 0xddd5, - 0xdddd, - 0xdfdd, - 0xdfdf, - 0xffdf, -}; - -static void s3c64xx_serial_setbrg(void) -{ - s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR); - u32 pclk = get_PCLK(); - u32 baudrate = gd->baudrate; - int i; - - i = (pclk / baudrate) % 16; - - uart->UBRDIV = pclk / baudrate / 16 - 1; - uart->UDIVSLOT = udivslot[i]; - - for (i = 0; i < 100; i++) - barrier(); -} - -/* - * Initialise the serial port with the given baudrate. The settings - * are always 8 data bits, no parity, 1 stop bit, no start bits. - */ -static int s3c64xx_serial_init(void) -{ - s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR); - - /* reset and enable FIFOs, set triggers to the maximum */ - uart->UFCON = 0xff; - uart->UMCON = 0; - /* 8N1 */ - uart->ULCON = 3; - /* No interrupts, no DMA, pure polling */ - uart->UCON = 5; - - serial_setbrg(); - - return 0; -} - -/* - * Read a single byte from the serial port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ -static int s3c64xx_serial_getc(void) -{ - s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR); - - /* wait for character to arrive */ - while (!(uart->UTRSTAT & 0x1)); - - return uart->URXH & 0xff; -} - -#ifdef CONFIG_MODEM_SUPPORT -static int be_quiet; -void disable_putc(void) -{ - be_quiet = 1; -} - -void enable_putc(void) -{ - be_quiet = 0; -} -#endif - - -/* - * Output a single byte to the serial port. - */ -static void s3c64xx_serial_putc(const char c) -{ - s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR); - -#ifdef CONFIG_MODEM_SUPPORT - if (be_quiet) - return; -#endif - - /* wait for room in the tx FIFO */ - while (!(uart->UTRSTAT & 0x2)); - - uart->UTXH = c; - - /* If \n, also do \r */ - if (c == '\n') - serial_putc('\r'); -} - -/* - * Test whether a character is in the RX buffer - */ -static int s3c64xx_serial_tstc(void) -{ - s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR); - - return uart->UTRSTAT & 0x1; -} - -static struct serial_device s3c64xx_serial_drv = { - .name = "s3c64xx_serial", - .start = s3c64xx_serial_init, - .stop = NULL, - .setbrg = s3c64xx_serial_setbrg, - .putc = s3c64xx_serial_putc, - .puts = default_serial_puts, - .getc = s3c64xx_serial_getc, - .tstc = s3c64xx_serial_tstc, -}; - -void s3c64xx_serial_initialize(void) -{ - serial_register(&s3c64xx_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &s3c64xx_serial_drv; -} diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 7922bf0669..9f04643551 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -165,7 +165,6 @@ serial_initfunc(atmel_serial_initialize); serial_initfunc(lpc32xx_serial_initialize); serial_initfunc(mcf_serial_initialize); serial_initfunc(oc_serial_initialize); -serial_initfunc(s3c64xx_serial_initialize); serial_initfunc(sandbox_serial_initialize); serial_initfunc(clps7111_serial_initialize); serial_initfunc(imx_serial_initialize); @@ -259,7 +258,6 @@ void serial_initialize(void) lpc32xx_serial_initialize(); mcf_serial_initialize(); oc_serial_initialize(); - s3c64xx_serial_initialize(); sandbox_serial_initialize(); clps7111_serial_initialize(); imx_serial_initialize(); diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 9a6f982080..87a59704db 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -31,7 +31,6 @@ COBJS-$(CONFIG_USB_ATMEL) += ohci-at91.o COBJS-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o -COBJS-$(CONFIG_USB_S3C64XX) += s3c64xx-hcd.o COBJS-$(CONFIG_USB_SL811HS) += sl811-hcd.o COBJS-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index bdbe250b01..bc17b85db5 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -66,7 +66,6 @@ #if defined(CONFIG_ARM920T) || \ defined(CONFIG_S3C24X0) || \ - defined(CONFIG_S3C6400) || \ defined(CONFIG_440EP) || \ defined(CONFIG_PCI_OHCI) || \ defined(CONFIG_MPC5200) || \ diff --git a/drivers/usb/host/s3c64xx-hcd.c b/drivers/usb/host/s3c64xx-hcd.c deleted file mode 100644 index cd295dabb7..0000000000 --- a/drivers/usb/host/s3c64xx-hcd.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * URB OHCI HCD (Host Controller Driver) initialization for USB on the S3C64XX. - * - * Copyright (C) 2008, - * Guennadi Liakhovetski, DENX Software Engineering <lg@denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#include <common.h> -#include <asm/arch/s3c6400.h> - -int usb_cpu_init(void) -{ - OTHERS_REG |= 0x10000; - return 0; -} - -int usb_cpu_stop(void) -{ - OTHERS_REG &= ~0x10000; - return 0; -} - -void usb_cpu_init_fail(void) -{ - OTHERS_REG &= ~0x10000; -} |