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-rw-r--r--drivers/mtd/nand/ndfc.c33
1 files changed, 29 insertions, 4 deletions
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index 0729e0c9c0..6ebbb5ebee 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -37,6 +37,13 @@
#include <asm/io.h>
#include <asm/ppc4xx.h>
+#ifndef CONFIG_SYS_NAND_BCR
+#define CONFIG_SYS_NAND_BCR 0x80002222
+#endif
+#ifndef CONFIG_SYS_NDFC_EBC0_CFG
+#define CONFIG_SYS_NDFC_EBC0_CFG 0xb8400000
+#endif
+
/*
* We need to store the info, which chip-select (CS) is used for the
* chip number. For example on Sequoia NAND chip #0 uses
@@ -140,12 +147,25 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len
return 0;
}
-#endif /* #ifndef CONFIG_NAND_SPL */
-#ifndef CONFIG_SYS_NAND_BCR
-#define CONFIG_SYS_NAND_BCR 0x80002222
+/*
+ * Read a byte from the NDFC.
+ */
+static uint8_t ndfc_read_byte(struct mtd_info *mtd)
+{
+
+ struct nand_chip *chip = mtd->priv;
+
+#ifdef CONFIG_SYS_NDFC_16BIT
+ return (uint8_t) readw(chip->IO_ADDR_R);
+#else
+ return readb(chip->IO_ADDR_R);
#endif
+}
+
+#endif /* #ifndef CONFIG_NAND_SPL */
+
void board_nand_select_device(struct nand_chip *nand, int chip)
{
/*
@@ -198,16 +218,21 @@ int board_nand_init(struct nand_chip *nand)
nand->ecc.bytes = 3;
nand->select_chip = ndfc_select_chip;
+#ifdef CONFIG_SYS_NDFC_16BIT
+ nand->options |= NAND_BUSWIDTH_16;
+#endif
+
#ifndef CONFIG_NAND_SPL
nand->write_buf = ndfc_write_buf;
nand->verify_buf = ndfc_verify_buf;
+ nand->read_byte = ndfc_read_byte;
chip++;
#else
/*
* Setup EBC (CS0 only right now)
*/
- mtebc(EBC0_CFG, 0xb8400000);
+ mtebc(EBC0_CFG, CONFIG_SYS_NDFC_EBC0_CFG);
mtebc(PB0CR, CONFIG_SYS_EBC_PB0CR);
mtebc(PB0AP, CONFIG_SYS_EBC_PB0AP);