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-rw-r--r--include/asm-m68k/immap_5329.h29
-rw-r--r--include/asm-m68k/m5329.h15
-rw-r--r--include/asm-m68k/m5445x.h4
3 files changed, 33 insertions, 15 deletions
diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h
index 2a3980c130..271c27655b 100644
--- a/include/asm-m68k/immap_5329.h
+++ b/include/asm-m68k/immap_5329.h
@@ -57,7 +57,8 @@
#define MMAP_PWM 0xFC090000
#define MMAP_EPORT 0xFC094000
#define MMAP_WDOG 0xFC098000
-#define MMAP_CCM 0xFC0A0000
+#define MMAP_RCM 0xFC0A0000
+#define MMAP_CCM 0xFC0A0004
#define MMAP_GPIO 0xFC0A4000
#define MMAP_RTC 0xFC0A8000
#define MMAP_LCDC 0xFC0AC000
@@ -479,20 +480,22 @@ typedef struct wdog_ctrl {
/*Chip configuration module registers */
typedef struct ccm_ctrl {
- u8 rstctrl; /* 0x00 Reset Controller register */
- u8 rststat; /* 0x01 Reset Status register */
- u16 res1; /* 0x02 - 0x03 */
- u16 ccr; /* 0x04 Chip configuration register */
- u16 res2; /* 0x06 */
- u16 rcon; /* 0x08 Rreset configuration register */
- u16 cir; /* 0x0A Chip identification register */
- u32 res3; /* 0x0C */
- u16 misccr; /* 0x10 Miscellaneous control register */
- u16 cdr; /* 0x12 Clock divider register */
- u16 uhcsr; /* 0x14 USB Host controller status register */
- u16 uocsr; /* 0x16 USB On-the-Go Controller Status Register */
+ u16 ccr; /* 0x00 Chip configuration register */
+ u16 res2; /* 0x02 */
+ u16 rcon; /* 0x04 Rreset configuration register */
+ u16 cir; /* 0x06 Chip identification register */
+ u32 res3; /* 0x08 */
+ u16 misccr; /* 0x0A Miscellaneous control register */
+ u16 cdr; /* 0x0C Clock divider register */
+ u16 uhcsr; /* 0x10 USB Host controller status register */
+ u16 uocsr; /* 0x12 USB On-the-Go Controller Status Reg */
} ccm_t;
+typedef struct rcm {
+ u8 rcr;
+ u8 rsr;
+} rcm_t;
+
/* GPIO port registers */
typedef struct gpio_ctrl {
/* Port Output Data Registers */
diff --git a/include/asm-m68k/m5329.h b/include/asm-m68k/m5329.h
index cd69fb0b5a..3f056511cb 100644
--- a/include/asm-m68k/m5329.h
+++ b/include/asm-m68k/m5329.h
@@ -246,6 +246,21 @@
#define CSCR_BSTW (0x00000008)
/*********************************************************************
+* Reset Controller Module (RCM)
+*********************************************************************/
+
+/* Bit definitions and macros for RCR */
+#define RCM_RCR_FRCRSTOUT (0x40)
+#define RCM_RCR_SOFTRST (0x80)
+
+/* Bit definitions and macros for RSR */
+#define RCM_RSR_LOL (0x01)
+#define RCM_RSR_WDR_CORE (0x02)
+#define RCM_RSR_EXT (0x04)
+#define RCM_RSR_POR (0x08)
+#define RCM_RSR_SOFT (0x20)
+
+/*********************************************************************
* FlexCAN Module (CAN)
*********************************************************************/
/* Bit definitions and macros for CAN_CANMCR */
diff --git a/include/asm-m68k/m5445x.h b/include/asm-m68k/m5445x.h
index 8b886b0b60..b2bfb69264 100644
--- a/include/asm-m68k/m5445x.h
+++ b/include/asm-m68k/m5445x.h
@@ -792,8 +792,8 @@
#define GPIO_PAR_FEC_FEC0_MASK (0xF8)
#define GPIO_PAR_FEC_FEC0_MII (0x07)
#define GPIO_PAR_FEC_FEC0_RMII_GPIO (0x03)
-#define GPIO_PAR_FEC_FEC0_RMII_ATA (0x02)
-#define GPIO_PAR_FEC_FEC0_ATA (0x01)
+#define GPIO_PAR_FEC_FEC0_RMII_ULPI (0x02)
+#define GPIO_PAR_FEC_FEC0_ULPI (0x01)
#define GPIO_PAR_FEC_FEC0_GPIO (0x00)
/* Bit definitions and macros for PAR_DMA */