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Diffstat (limited to 'include/configs/xilinx_zynqmp_zcu106.h')
-rw-r--r--include/configs/xilinx_zynqmp_zcu106.h47
1 files changed, 47 insertions, 0 deletions
diff --git a/include/configs/xilinx_zynqmp_zcu106.h b/include/configs/xilinx_zynqmp_zcu106.h
new file mode 100644
index 0000000000..0f0d8c6d42
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_zcu106.h
@@ -0,0 +1,47 @@
+/*
+ * Configuration for Xilinx ZynqMP zcu106
+ *
+ * (C) Copyright 2016 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQMP_ZCU106_H
+#define __CONFIG_ZYNQMP_ZCU106_H
+
+#define CONFIG_ZYNQ_SDHCI1
+#define CONFIG_SYS_I2C_MAX_HOPS 1
+#define CONFIG_SYS_NUM_I2C_BUSES 18
+#define CONFIG_SYS_I2C_BUSES { \
+ {0, {I2C_NULL_HOP} }, \
+ {0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
+ {0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
+ {0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
+ {1, {I2C_NULL_HOP} }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
+ {1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
+ }
+
+#define CONFIG_PCA953X
+
+#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
+
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_ZYNQ_EEPROM_BUS 5
+#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
+
+#include <configs/xilinx_zynqmp.h>
+
+#endif /* __CONFIG_ZYNQMP_ZCU106_H */