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-rw-r--r--include/configs/k2g_evm.h2
-rw-r--r--include/configs/socfpga_common.h2
-rw-r--r--include/configs/stv0991.h2
-rw-r--r--include/spi.h32
-rw-r--r--include/spi_flash.h12
-rw-r--r--include/wait_bit.h85
6 files changed, 52 insertions, 83 deletions
diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h
index 4e43104fac..f00ca1c233 100644
--- a/include/configs/k2g_evm.h
+++ b/include/configs/k2g_evm.h
@@ -95,8 +95,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CADENCE_QSPI
#define CONFIG_CQSPI_REF_CLK 384000000
-#define CONFIG_CQSPI_DECODER 0x0
-#define CONFIG_BOUNCE_BUFFER
#endif
#define SPI_MTD_PARTS KEYSTONE_SPI1_MTD_PARTS
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 66e7c4fc8b..f6607b101e 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -184,8 +184,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz()
#endif
-#define CONFIG_CQSPI_DECODER 0
-#define CONFIG_BOUNCE_BUFFER
/*
* Designware SPI support
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index c99fb676cb..beb8f1ae9a 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -63,9 +63,7 @@
+ * QSPI support
+ */
#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
-#define CONFIG_CQSPI_DECODER 0
#define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000
-#define CONFIG_BOUNCE_BUFFER
#endif
diff --git a/include/spi.h b/include/spi.h
index 08c7480fda..f5bac8d002 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -86,8 +86,10 @@ struct dm_spi_slave_platdata {
* @cs: ID of the chip select connected to the slave.
* @mode: SPI mode to use for this slave (see SPI mode flags)
* @wordlen: Size of SPI word in number of bits
+ * @max_read_size: If non-zero, the maximum number of bytes which can
+ * be read at once.
* @max_write_size: If non-zero, the maximum number of bytes which can
- * be written at once, excluding command bytes.
+ * be written at once.
* @memory_map: Address of read-only SPI flash access.
* @flags: Indication of SPI flags.
*/
@@ -102,6 +104,7 @@ struct spi_slave {
#endif
uint mode;
unsigned int wordlen;
+ unsigned int max_read_size;
unsigned int max_write_size;
void *memory_map;
@@ -314,33 +317,6 @@ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
return ret < 0 ? ret : din[1];
}
-/**
- * Set up a SPI slave for a particular device tree node
- *
- * This calls spi_setup_slave() with the correct bus number. Call
- * spi_free_slave() to free it later.
- *
- * @param blob: Device tree blob
- * @param slave_node: Slave node to use
- * @param spi_node: SPI peripheral node to use
- * @return pointer to new spi_slave structure
- */
-struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,
- int spi_node);
-
-/**
- * spi_base_setup_slave_fdt() - helper function to set up a SPI slace
- *
- * This decodes SPI properties from the slave node to determine the
- * chip select and SPI parameters.
- *
- * @blob: Device tree blob
- * @busnum: Bus number to use
- * @node: Device tree node for the SPI bus
- */
-struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum,
- int node);
-
#ifdef CONFIG_DM_SPI
/**
diff --git a/include/spi_flash.h b/include/spi_flash.h
index be2fe3f84c..f3c4e83424 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -194,18 +194,6 @@ void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode);
-/**
- * Set up a new SPI flash from an fdt node
- *
- * @param blob Device tree blob
- * @param slave_node Pointer to this SPI slave node in the device tree
- * @param spi_node Cached pointer to the SPI interface this node belongs
- * to
- * @return 0 if ok, -1 on error
- */
-struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
- int spi_node);
-
void spi_flash_free(struct spi_flash *flash);
static inline int spi_flash_read(struct spi_flash *flash, u32 offset,
diff --git a/include/wait_bit.h b/include/wait_bit.h
index 06ad43a122..bd021baa48 100644
--- a/include/wait_bit.h
+++ b/include/wait_bit.h
@@ -16,7 +16,7 @@
#include <asm/io.h>
/**
- * wait_for_bit() waits for bit set/cleared in register
+ * wait_for_bit_x() waits for bit set/cleared in register
*
* Function polls register waiting for specific bit(s) change
* (either 0->1 or 1->0). It can fail under two conditions:
@@ -25,49 +25,60 @@
* Function succeeds only if all bits of masked register are set/cleared
* (depending on set option).
*
- * @param prefix Prefix added to timeout messagge (message visible only
- * with debug enabled)
- * @param reg Register that will be read (using readl())
+ * @param reg Register that will be read (using read_x())
* @param mask Bit(s) of register that must be active
* @param set Selects wait condition (bit set or clear)
- * @param timeout_ms Timeout (in miliseconds)
+ * @param timeout_ms Timeout (in milliseconds)
* @param breakable Enables CTRL-C interruption
* @return 0 on success, -ETIMEDOUT or -EINTR on failure
*/
-static inline int wait_for_bit(const char *prefix, const u32 *reg,
- const u32 mask, const bool set,
- const unsigned int timeout_ms,
- const bool breakable)
-{
- u32 val;
- unsigned long start = get_timer(0);
- while (1) {
- val = readl(reg);
-
- if (!set)
- val = ~val;
-
- if ((val & mask) == mask)
- return 0;
-
- if (get_timer(start) > timeout_ms)
- break;
-
- if (breakable && ctrlc()) {
- puts("Abort\n");
- return -EINTR;
- }
-
- udelay(1);
- WATCHDOG_RESET();
- }
-
- debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n", prefix, reg, mask,
- set);
-
- return -ETIMEDOUT;
+#define BUILD_WAIT_FOR_BIT(sfx, type, read) \
+ \
+static inline int wait_for_bit_##sfx(const void *reg, \
+ const type mask, \
+ const bool set, \
+ const unsigned int timeout_ms, \
+ const bool breakable) \
+{ \
+ type val; \
+ unsigned long start = get_timer(0); \
+ \
+ while (1) { \
+ val = read(reg); \
+ \
+ if (!set) \
+ val = ~val; \
+ \
+ if ((val & mask) == mask) \
+ return 0; \
+ \
+ if (get_timer(start) > timeout_ms) \
+ break; \
+ \
+ if (breakable && ctrlc()) { \
+ puts("Abort\n"); \
+ return -EINTR; \
+ } \
+ \
+ udelay(1); \
+ WATCHDOG_RESET(); \
+ } \
+ \
+ debug("%s: Timeout (reg=%p mask=%x wait_set=%i)\n", __func__, \
+ reg, mask, set); \
+ \
+ return -ETIMEDOUT; \
}
+BUILD_WAIT_FOR_BIT(8, u8, readb)
+BUILD_WAIT_FOR_BIT(le16, u16, readw)
+#ifdef readw_be
+BUILD_WAIT_FOR_BIT(be16, u16, readw_be)
+#endif
+BUILD_WAIT_FOR_BIT(le32, u32, readl)
+#ifdef readl_be
+BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
+#endif
#endif