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-rw-r--r--include/cpu.h35
-rw-r--r--include/dm/of_access.h16
-rw-r--r--include/dm/ofnode.h14
-rw-r--r--include/dm/uclass.h1
-rw-r--r--include/dt-bindings/clk/mpc83xx-clk.h33
-rw-r--r--include/dt-bindings/memory/mpc83xx-sdram.h161
-rw-r--r--include/init.h34
-rw-r--r--include/linux/bitrev.h102
-rw-r--r--include/mpc83xx.h6
-rw-r--r--include/sysreset.h17
10 files changed, 384 insertions, 35 deletions
diff --git a/include/cpu.h b/include/cpu.h
index 5cc7c5abd7..367c5f46a0 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -9,19 +9,21 @@
/**
* struct cpu_platdata - platform data for a CPU
+ * @cpu_id: Platform-specific way of identifying the CPU.
+ * @ucode_version: Microcode version, if CPU_FEAT_UCODE is set
+ * @device_id: Driver-defined device identifier
+ * @family: DMTF CPU Family identifier
+ * @id: DMTF CPU Processor identifier
*
* This can be accessed with dev_get_parent_platdata() for any UCLASS_CPU
* device.
- *
- * @cpu_id: Platform-specific way of identifying the CPU.
- * @ucode_version: Microcode version, if CPU_FEAT_UCODE is set
*/
struct cpu_platdata {
int cpu_id;
int ucode_version;
ulong device_id;
- u16 family; /* DMTF CPU Family */
- u32 id[2]; /* DMTF CPU Processor IDs */
+ u16 family;
+ u32 id[2];
};
/* CPU features - mostly just a placeholder for now */
@@ -88,39 +90,46 @@ struct cpu_ops {
/**
* cpu_get_desc() - Get a description string for a CPU
- *
* @dev: Device to check (UCLASS_CPU)
* @buf: Buffer to place string
* @size: Size of string space
- * @return 0 if OK, -ENOSPC if buffer is too small, other -ve on error
+ *
+ * Return: 0 if OK, -ENOSPC if buffer is too small, other -ve on error
*/
int cpu_get_desc(struct udevice *dev, char *buf, int size);
/**
* cpu_get_info() - Get information about a CPU
- *
* @dev: Device to check (UCLASS_CPU)
* @info: Returns CPU info
- * @return 0 if OK, -ve on error
+ *
+ * Return: 0 if OK, -ve on error
*/
int cpu_get_info(struct udevice *dev, struct cpu_info *info);
/**
* cpu_get_count() - Get number of CPUs
- *
* @dev: Device to check (UCLASS_CPU)
- * @return CPU count if OK, -ve on error
+ *
+ * Return: CPU count if OK, -ve on error
*/
int cpu_get_count(struct udevice *dev);
/**
* cpu_get_vendor() - Get vendor name of a CPU
- *
* @dev: Device to check (UCLASS_CPU)
* @buf: Buffer to place string
* @size: Size of string space
- * @return 0 if OK, -ENOSPC if buffer is too small, other -ve on error
+ *
+ * Return: 0 if OK, -ENOSPC if buffer is too small, other -ve on error
*/
int cpu_get_vendor(struct udevice *dev, char *buf, int size);
+/**
+ * cpu_probe_all() - Probe all available CPUs
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int cpu_probe_all(void);
+
#endif
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index dd1abb8e97..5ed1a0cdb4 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -194,6 +194,22 @@ struct device_node *of_find_compatible_node(struct device_node *from,
const char *type, const char *compatible);
/**
+ * of_find_node_by_prop_value() - find a node with a given property value
+ *
+ * Find a node based on a property value.
+ * @from: Node to start searching from or NULL. the node you pass will not be
+ * searched, only the next one will; typically, you pass what the previous
+ * call returned.
+ * @propname: property name to check
+ * @propval: property value to search for
+ * @proplen: length of the value in propval
+ * @return node pointer or NULL if not found
+ */
+struct device_node *of_find_node_by_prop_value(struct device_node *from,
+ const char *propname,
+ const void *propval,
+ int proplen);
+/**
* of_find_node_by_phandle() - Find a node given a phandle
*
* @handle: phandle of the node to find
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index ab36b74c4c..c06d77849c 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -703,6 +703,20 @@ int ofnode_read_resource_byname(ofnode node, const char *name,
ofnode ofnode_by_compatible(ofnode from, const char *compat);
/**
+ * ofnode_by_prop_value() - Find the next node with given property value
+ *
+ * Find the next node after @from that has a @propname with a value
+ * @propval and a length @proplen.
+ *
+ * @from: ofnode to start from (use ofnode_null() to start at the
+ * beginning) @propname: property name to check @propval: property value to
+ * search for @proplen: length of the value in propval @return ofnode
+ * found, or ofnode_null() if none
+ */
+ofnode ofnode_by_prop_value(ofnode from, const char *propname,
+ const void *propval, int proplen);
+
+/**
* ofnode_for_each_subnode() - iterate over all subnodes of a parent
*
* @node: child node (ofnode, lvalue)
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 0e882cec59..6e7c1cd3e8 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -58,6 +58,7 @@ struct udevice;
* @post_probe: Called after a new device is probed
* @pre_remove: Called before a device is removed
* @child_post_bind: Called after a child is bound to a device in this uclass
+ * @child_pre_probe: Called before a child is probed in this uclass
* @init: Called to set up the uclass
* @destroy: Called to destroy the uclass
* @priv_auto_alloc_size: If non-zero this is the size of the private data
diff --git a/include/dt-bindings/clk/mpc83xx-clk.h b/include/dt-bindings/clk/mpc83xx-clk.h
new file mode 100644
index 0000000000..db4ea15cf4
--- /dev/null
+++ b/include/dt-bindings/clk/mpc83xx-clk.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
+ */
+
+#ifndef DT_BINDINGS_MPC83XX_CLK_H
+#define DT_BINDINGS_MPC83XX_CLK_H
+#define MPC83XX_CLK_CORE 0
+#define MPC83XX_CLK_CSB 1
+#define MPC83XX_CLK_QE 2
+#define MPC83XX_CLK_BRG 3
+#define MPC83XX_CLK_LBIU 4
+#define MPC83XX_CLK_LCLK 5
+#define MPC83XX_CLK_MEM 6
+#define MPC83XX_CLK_MEM_SEC 7
+#define MPC83XX_CLK_ENC 8
+#define MPC83XX_CLK_I2C1 9
+#define MPC83XX_CLK_I2C2 10
+#define MPC83XX_CLK_TDM 11
+#define MPC83XX_CLK_SDHC 12
+#define MPC83XX_CLK_TSEC1 13
+#define MPC83XX_CLK_TSEC2 14
+#define MPC83XX_CLK_USBDR 15
+#define MPC83XX_CLK_USBMPH 16
+#define MPC83XX_CLK_PCIEXP1 17
+#define MPC83XX_CLK_PCIEXP2 18
+#define MPC83XX_CLK_SATA 19
+#define MPC83XX_CLK_DMAC 20
+#define MPC83XX_CLK_PCI 21
+/* Count */
+#define MPC83XX_CLK_COUNT 22
+#endif /* DT_BINDINGS_MPC83XX_CLK_H */
diff --git a/include/dt-bindings/memory/mpc83xx-sdram.h b/include/dt-bindings/memory/mpc83xx-sdram.h
new file mode 100644
index 0000000000..7d4ce01cc4
--- /dev/null
+++ b/include/dt-bindings/memory/mpc83xx-sdram.h
@@ -0,0 +1,161 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2018
+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
+ */
+
+#ifndef DT_BINDINGS_MPC83XX_SDRAM_H
+#define DT_BINDINGS_MPC83XX_SDRAM_H
+
+/* DDR Control Driver register */
+
+#define DSO_DISABLE 0
+#define DSO_ENABLE 1
+
+#define DSO_P_IMPEDANCE_HIGHEST_Z 0x0
+#define DSO_P_IMPEDANCE_MUCH_HIGHER_Z 0x8
+#define DSO_P_IMPEDANCE_HIGHER_Z 0xC
+#define DSO_P_IMPEDANCE_NOMINAL 0xE
+#define DSO_P_IMPEDANCE_LOWER_Z 0xF
+
+#define DSO_N_IMPEDANCE_HIGHEST_Z 0x0
+#define DSO_N_IMPEDANCE_MUCH_HIGHER_Z 0x8
+#define DSO_N_IMPEDANCE_HIGHER_Z 0xC
+#define DSO_N_IMPEDANCE_NOMINAL 0xE
+#define DSO_N_IMPEDANCE_LOWER_Z 0xF
+
+#define ODT_TERMINATION_75_OHM 0
+#define ODT_TERMINATION_150_OHM 1
+
+#define DDR_TYPE_DDR2_1_8_VOLT 0
+#define DDR_TYPE_DDR1_2_5_VOLT 1
+
+#define MVREF_SEL_EXTERNAL 0
+#define MVREF_SEL_INTERNAL_GVDD 1
+
+#define M_ODR_ENABLE 0
+#define M_ODR_DISABLE 1
+
+/* CS config register */
+
+#define AUTO_PRECHARGE_ENABLE 0x00800000
+#define AUTO_PRECHARGE_DISABLE 0x00000000
+
+#define ODT_RD_NEVER 0x00000000
+#define ODT_RD_ONLY_CURRENT 0x00100000
+#define ODT_RD_ONLY_OTHER_CS 0x00200000
+#define ODT_RD_ONLY_OTHER_DIMM 0x00300000
+#define ODT_RD_ALL 0x00400000
+
+#define ODT_WR_NEVER 0x00000000
+#define ODT_WR_ONLY_CURRENT 0x00010000
+#define ODT_WR_ONLY_OTHER_CS 0x00020000
+#define ODT_WR_ONLY_OTHER_DIMM 0x00030000
+#define ODT_WR_ALL 0x00040000
+
+/* DDR SDRAM Clock Control register */
+
+#define CLOCK_ADJUST_025 0x01000000
+#define CLOCK_ADJUST_05 0x02000000
+#define CLOCK_ADJUST_075 0x03000000
+#define CLOCK_ADJUST_1 0x04000000
+
+#define CASLAT_20 0x3 /* CAS latency = 2.0 */
+#define CASLAT_25 0x4 /* CAS latency = 2.5 */
+#define CASLAT_30 0x5 /* CAS latency = 3.0 */
+#define CASLAT_35 0x6 /* CAS latency = 3.5 */
+#define CASLAT_40 0x7 /* CAS latency = 4.0 */
+#define CASLAT_45 0x8 /* CAS latency = 4.5 */
+#define CASLAT_50 0x9 /* CAS latency = 5.0 */
+#define CASLAT_55 0xa /* CAS latency = 5.5 */
+#define CASLAT_60 0xb /* CAS latency = 6.0 */
+#define CASLAT_65 0xc /* CAS latency = 6.5 */
+#define CASLAT_70 0xd /* CAS latency = 7.0 */
+#define CASLAT_75 0xe /* CAS latency = 7.5 */
+#define CASLAT_80 0xf /* CAS latency = 8.0 */
+
+/* DDR SDRAM Timing Configuration 2 register */
+
+#define READ_LAT_PLUS_1 0x0
+#define READ_LAT 0x2
+#define READ_LAT_PLUS_1_4 0x3
+#define READ_LAT_PLUS_1_2 0x4
+#define READ_LAT_PLUS_3_4 0x5
+#define READ_LAT_PLUS_5_4 0x7
+#define READ_LAT_PLUS_3_2 0x8
+#define READ_LAT_PLUS_7_4 0x9
+#define READ_LAT_PLUS_2 0xA
+#define READ_LAT_PLUS_9_4 0xB
+#define READ_LAT_PLUS_5_2 0xC
+#define READ_LAT_PLUS_11_4 0xD
+#define READ_LAT_PLUS_3 0xE
+#define READ_LAT_PLUS_13_4 0xF
+#define READ_LAT_PLUS_7_2 0x10
+#define READ_LAT_PLUS_15_4 0x11
+#define READ_LAT_PLUS_4 0x12
+#define READ_LAT_PLUS_17_4 0x13
+#define READ_LAT_PLUS_9_2 0x14
+#define READ_LAT_PLUS_19_4 0x15
+
+#define CLOCK_DELAY_0 0x0
+#define CLOCK_DELAY_1_4 0x1
+#define CLOCK_DELAY_1_2 0x2
+#define CLOCK_DELAY_3_4 0x3
+#define CLOCK_DELAY_1 0x4
+#define CLOCK_DELAY_5_4 0x5
+#define CLOCK_DELAY_3_2 0x6
+
+/* DDR SDRAM Control Configuration */
+
+#define SREN_DISABLE 0x0
+#define SREN_ENABLE 0x1
+
+#define ECC_DISABLE 0x0
+#define ECC_ENABLE 0x1
+
+#define RD_DISABLE 0x0
+#define RD_ENABLE 0x1
+
+#define TYPE_DDR1 0x2
+#define TYPE_DDR2 0x3
+
+#define DYN_PWR_DISABLE 0x0
+#define DYN_PWR_ENABLE 0x1
+
+#define DATA_BUS_WIDTH_16 0x1
+#define DATA_BUS_WIDTH_32 0x2
+
+#define NCAP_DISABLE 0x0
+#define NCAP_ENABLE 0x1
+
+#define TIMING_1T 0x0
+#define TIMING_2T 0x1
+
+#define INTERLEAVE_NONE 0x0
+#define INTERLEAVE_1_AND_2 0x1
+
+#define PRECHARGE_MA_10 0x0
+#define PRECHARGE_MA_8 0x1
+
+#define STRENGTH_FULL 0x0
+#define STRENGTH_HALF 0x1
+
+#define INITIALIZATION_DONT_BYPASS 0x0
+#define INITIALIZATION_BYPASS 0x1
+
+/* DDR SDRAM Control Configuration 2 register */
+
+#define MODE_NORMAL 0x0
+#define MODE_REFRESH 0x1
+
+#define DLL_RESET_ENABLE 0x0
+#define DLL_RESET_DISABLE 0x1
+
+#define DQS_TRUE 0x0
+
+#define ODT_ASSERT_NEVER 0x0
+#define ODT_ASSERT_WRITES 0x1
+#define ODT_ASSERT_READS 0x2
+#define ODT_ASSERT_ALWAYS 0x3
+
+#endif
diff --git a/include/init.h b/include/init.h
index f114a88963..afc953d51e 100644
--- a/include/init.h
+++ b/include/init.h
@@ -27,7 +27,7 @@ void board_init_f(ulong dummy);
* board_f.c for where it is called. If this is not provided, a default
* version (which does nothing) will be used.
*
- * @return: 0 on success, otherwise error
+ * Return: 0 on success, otherwise error
*/
int arch_cpu_init(void);
@@ -38,7 +38,7 @@ int arch_cpu_init(void);
* relocation. This is similar to arch_cpu_init() but is able to reference
* devices
*
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
*/
int arch_cpu_init_dm(void);
@@ -50,7 +50,7 @@ int arch_cpu_init_dm(void);
* board_f.c for where it is called. If this is not provided, a default
* version (which does nothing) will be used.
*
- * @return: 0 on success, otherwise error
+ * Return: 0 on success, otherwise error
*/
int mach_cpu_init(void);
@@ -60,6 +60,8 @@ int mach_cpu_init(void);
* Where U-Boot relies on binary blobs to handle part of the system init, this
* function can be used to set up the blobs. This is used on some Intel
* platforms.
+ *
+ * Return: 0
*/
int arch_fsp_init(void);
@@ -78,12 +80,12 @@ int dram_init(void);
* CONFIG_SYS_SDRAM_BASE and the size will be determined by a call to
* get_effective_memsize().
*
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
*/
int dram_init_banksize(void);
/**
- * Reserve all necessary stacks
+ * arch_reserve_stacks() - Reserve all necessary stacks
*
* This is used in generic board init sequence in common/board_f.c. Each
* architecture could provide this function to tailor the required stacks.
@@ -96,21 +98,29 @@ int dram_init_banksize(void);
* positions of the stack. The stack pointer(s) will be set to this later.
* gd->irq_sp is only required, if the architecture needs it.
*
- * @return 0 if no error
+ * Return: 0 if no error
*/
int arch_reserve_stacks(void);
/**
* init_cache_f_r() - Turn on the cache in preparation for relocation
*
- * @return 0 if OK, -ve on error
+ * Return: 0 if OK, -ve on error
*/
int init_cache_f_r(void);
+#if !CONFIG_IS_ENABLED(CPU)
+/**
+ * print_cpuinfo() - Display information about the CPU
+ *
+ * Return: 0 if OK, -ve on error
+ */
int print_cpuinfo(void);
+#endif
int timer_init(void);
int reserve_mmu(void);
int misc_init_f(void);
+
#if defined(CONFIG_DTB_RESELECT)
int embedded_dtb_select(void);
#endif
@@ -120,28 +130,28 @@ extern ulong monitor_flash_len;
/**
* ulong board_init_f_alloc_reserve - allocate reserved area
+ * @top: top of the reserve area, growing down.
*
* This function is called by each architecture very early in the start-up
* code to allow the C runtime to reserve space on the stack for writable
* 'globals' such as GD and the malloc arena.
*
- * @top: top of the reserve area, growing down.
- * @return: bottom of reserved area
+ * Return: bottom of reserved area
*/
ulong board_init_f_alloc_reserve(ulong top);
/**
* board_init_f_init_reserve - initialize the reserved area(s)
+ * @base: top from which reservation was done
*
* This function is called once the C runtime has allocated the reserved
* area on the stack. It must initialize the GD at the base of that area.
- *
- * @base: top from which reservation was done
*/
void board_init_f_init_reserve(ulong base);
/**
* arch_setup_gd() - Set up the global_data pointer
+ * @gd_ptr: Pointer to global data
*
* This pointer is special in some architectures and cannot easily be assigned
* to. For example on x86 it is implemented by adding a specific record to its
@@ -149,8 +159,6 @@ void board_init_f_init_reserve(ulong base);
* For most architectures this can simply be:
*
* gd = gd_ptr;
- *
- * @gd_ptr: Pointer to global data
*/
void arch_setup_gd(gd_t *gd_ptr);
diff --git a/include/linux/bitrev.h b/include/linux/bitrev.h
index cc5abd7396..8ec9411aad 100644
--- a/include/linux/bitrev.h
+++ b/include/linux/bitrev.h
@@ -1,21 +1,105 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Based on bitrev from the Linux kernel, by Akinobu Mita
- */
-
+/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _LINUX_BITREV_H
#define _LINUX_BITREV_H
#include <linux/types.h>
-extern u8 const byte_rev_table[256];
+#ifdef CONFIG_HAVE_ARCH_BITREVERSE
+#include <asm/bitrev.h>
+
+#define __bitrev32 __arch_bitrev32
+#define __bitrev16 __arch_bitrev16
+#define __bitrev8 __arch_bitrev8
-static inline u8 bitrev8(u8 byte)
+#else
+extern u8 const byte_rev_table[256];
+static inline u8 __bitrev8(u8 byte)
{
return byte_rev_table[byte];
}
-u16 bitrev16(u16 in);
-u32 bitrev32(u32 in);
+static inline u16 __bitrev16(u16 x)
+{
+ return (__bitrev8(x & 0xff) << 8) | __bitrev8(x >> 8);
+}
+
+static inline u32 __bitrev32(u32 x)
+{
+ return (__bitrev16(x & 0xffff) << 16) | __bitrev16(x >> 16);
+}
+
+#endif /* CONFIG_HAVE_ARCH_BITREVERSE */
+
+#define __bitrev8x4(x) (__bitrev32(swab32(x)))
+
+#define __constant_bitrev32(x) \
+({ \
+ u32 __x = x; \
+ __x = (__x >> 16) | (__x << 16);\
+ __x = ((__x & (u32)0xFF00FF00UL) >> 8) | ((__x & (u32)0x00FF00FFUL) << 8); \
+ __x = ((__x & (u32)0xF0F0F0F0UL) >> 4) | ((__x & (u32)0x0F0F0F0FUL) << 4); \
+ __x = ((__x & (u32)0xCCCCCCCCUL) >> 2) | ((__x & (u32)0x33333333UL) << 2); \
+ __x = ((__x & (u32)0xAAAAAAAAUL) >> 1) | ((__x & (u32)0x55555555UL) << 1); \
+ __x; \
+})
+
+#define __constant_bitrev16(x) \
+({ \
+ u16 __x = x; \
+ __x = (__x >> 8) | (__x << 8); \
+ __x = ((__x & (u16)0xF0F0U) >> 4) | ((__x & (u16)0x0F0FU) << 4); \
+ __x = ((__x & (u16)0xCCCCU) >> 2) | ((__x & (u16)0x3333U) << 2); \
+ __x = ((__x & (u16)0xAAAAU) >> 1) | ((__x & (u16)0x5555U) << 1); \
+ __x; \
+})
+
+#define __constant_bitrev8x4(x) \
+({ \
+ u32 __x = x; \
+ __x = ((__x & (u32)0xF0F0F0F0UL) >> 4) | ((__x & (u32)0x0F0F0F0FUL) << 4); \
+ __x = ((__x & (u32)0xCCCCCCCCUL) >> 2) | ((__x & (u32)0x33333333UL) << 2); \
+ __x = ((__x & (u32)0xAAAAAAAAUL) >> 1) | ((__x & (u32)0x55555555UL) << 1); \
+ __x; \
+})
+
+#define __constant_bitrev8(x) \
+({ \
+ u8 __x = x; \
+ __x = (__x >> 4) | (__x << 4); \
+ __x = ((__x & (u8)0xCCU) >> 2) | ((__x & (u8)0x33U) << 2); \
+ __x = ((__x & (u8)0xAAU) >> 1) | ((__x & (u8)0x55U) << 1); \
+ __x; \
+})
+
+#define bitrev32(x) \
+({ \
+ u32 __x = x; \
+ __builtin_constant_p(__x) ? \
+ __constant_bitrev32(__x) : \
+ __bitrev32(__x); \
+})
+
+#define bitrev16(x) \
+({ \
+ u16 __x = x; \
+ __builtin_constant_p(__x) ? \
+ __constant_bitrev16(__x) : \
+ __bitrev16(__x); \
+})
+
+#define bitrev8x4(x) \
+({ \
+ u32 __x = x; \
+ __builtin_constant_p(__x) ? \
+ __constant_bitrev8x4(__x) : \
+ __bitrev8x4(__x); \
+})
+#define bitrev8(x) \
+({ \
+ u8 __x = x; \
+ __builtin_constant_p(__x) ? \
+ __constant_bitrev8(__x) : \
+ __bitrev8(__x) ; \
+})
#endif /* _LINUX_BITREV_H */
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index e1e50ab6b5..a4c5bd3837 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -1110,6 +1110,8 @@
#define CSBNDS_EA 0x000000FF
#define CSBNDS_EA_SHIFT 24
+#ifndef CONFIG_MPC83XX_SDRAM
+
/*
* CSn_CONFIG - Chip Select Configuration Register
*/
@@ -1407,6 +1409,8 @@
#define ECC_ERROR_MAN_SBEC (0xff000000 >> 24)
#define ECC_ERROR_MAN_SBEC_SHIFT 0
+#endif /* !CONFIG_MPC83XX_SDRAM */
+
/*
* CONFIG_ADDRESS - PCI Config Address Register
*/
@@ -1510,6 +1514,7 @@
*/
#define PMCCR1_POWER_OFF 0x00000020
+#ifndef CONFIG_RAM
/*
* DDRCDR - DDR Control Driver Register
*/
@@ -1531,6 +1536,7 @@
#define DDRCDR_DDR_CFG 0x00040000
#define DDRCDR_M_ODR 0x00000002
#define DDRCDR_Q_DRN 0x00000001
+#endif /* !CONFIG_RAM */
/*
* PCIE Bridge Register
diff --git a/include/sysreset.h b/include/sysreset.h
index 81318bdbf5..a5c0b74a47 100644
--- a/include/sysreset.h
+++ b/include/sysreset.h
@@ -28,6 +28,14 @@ struct sysreset_ops {
* (in which case this method will not actually return)
*/
int (*request)(struct udevice *dev, enum sysreset_t type);
+ /**
+ * get_status() - get printable reset status information
+ *
+ * @buf: Buffer to receive the textual reset information
+ * @size: Size of the passed buffer
+ * @return 0 if OK, -ve on error
+ */
+ int (*get_status)(struct udevice *dev, char *buf, int size);
};
#define sysreset_get_ops(dev) ((struct sysreset_ops *)(dev)->driver->ops)
@@ -41,6 +49,15 @@ struct sysreset_ops {
int sysreset_request(struct udevice *dev, enum sysreset_t type);
/**
+ * get_status() - get printable reset status information
+ *
+ * @buf: Buffer to receive the textual reset information
+ * @size: Size of the passed buffer
+ * @return 0 if OK, -ve on error
+ */
+int sysreset_get_status(struct udevice *dev, char *buf, int size);
+
+/**
* sysreset_walk() - cause a system reset
*
* This works through the available sysreset devices until it finds one that can