diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-generic/global_data.h | 6 | ||||
| -rw-r--r-- | include/configs/chromebook_link.h | 8 | ||||
| -rw-r--r-- | include/configs/coreboot.h | 75 | ||||
| -rw-r--r-- | include/configs/crownbay.h | 2 | ||||
| -rw-r--r-- | include/fdtdec.h | 109 |
5 files changed, 106 insertions, 94 deletions
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 9c5a1e166f..3d14d5f117 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -91,6 +91,12 @@ typedef struct global_data { unsigned long malloc_limit; /* limit address */ unsigned long malloc_ptr; /* current address */ #endif +#ifdef CONFIG_PCI + struct pci_controller *hose; /* PCI hose for early use */ +#endif +#ifdef CONFIG_PCI_BOOTDELAY + int pcidelay_done; +#endif struct udevice *cur_serial_dev; /* current serial device */ struct arch_global_data arch; /* architecture-specific data */ } gd_t; diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 8930210908..7e6d239d13 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -15,15 +15,12 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_CAR_ADDR 0xff7e0000 -#define CONFIG_SYS_CAR_SIZE (128 * 1024) + #define CONFIG_SYS_MONITOR_LEN (1 << 20) + #define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000 -#define CONFIG_SYS_X86_START16 0xfffff800 #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 @@ -41,7 +38,6 @@ #define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin #define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000 -#define CONFIG_VIDEO_X86 #define CONFIG_PCI_MEM_BUS 0xe0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h deleted file mode 100644 index 990a2d186e..0000000000 --- a/include/configs/coreboot.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2008 - * Graeme Russ, graeme.russ@gmail.com. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <configs/x86-common.h> - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SYS_COREBOOT -#define CONFIG_LAST_STAGE_INIT -#define CONFIG_SYS_EARLY_PCI_INIT - -#define CONFIG_SYS_CAR_ADDR 0x19200000 -#define CONFIG_SYS_CAR_SIZE (16 * 1024) -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) - -#define CONFIG_TRACE_EARLY_SIZE (8 << 20) -#define CONFIG_TRACE_EARLY -#define CONFIG_TRACE_EARLY_ADDR 0x01400000 - -#define CONFIG_BOOTSTAGE -#define CONFIG_BOOTSTAGE_REPORT -#define CONFIG_BOOTSTAGE_FDT -#define CONFIG_CMD_BOOTSTAGE -/* Place to stash bootstage data from first-stage U-Boot */ -#define CONFIG_BOOTSTAGE_STASH 0x0110f000 -#define CONFIG_BOOTSTAGE_STASH_SIZE 0x7fc -#define CONFIG_BOOTSTAGE_USER_COUNT 60 - -#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} - -#define CONFIG_X86_SERIAL - -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \ - "stdout=vga,serial,cbmem\0" \ - "stderr=vga,serial,cbmem\0" - -#define CONFIG_CBMEM_CONSOLE - -#define CONFIG_VIDEO_COREBOOT - -#define CONFIG_NR_DRAM_BANKS 4 - -#define CONFIG_TRACE -#define CONFIG_CMD_TRACE -#define CONFIG_TRACE_BUFFER_SIZE (16 << 20) - -#define CONFIG_BOOTDELAY 2 - -#define CONFIG_CROS_EC -#define CONFIG_CROS_EC_LPC -#define CONFIG_CMD_CROS_EC -#define CONFIG_ARCH_EARLY_INIT_R - -#endif /* __CONFIG_H */ diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index eadb339a0f..b927b1c9f5 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -14,10 +14,8 @@ #include <configs/x86-common.h> #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_SYS_X86_START16 0xfffff800 #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_X86_SERIAL diff --git a/include/fdtdec.h b/include/fdtdec.h index 5effa240af..75af750ee5 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -15,6 +15,7 @@ */ #include <libfdt.h> +#include <pci.h> /* * A typedef for a physical address. Note that fdt data is always big @@ -50,6 +51,49 @@ struct fdt_resource { fdt_addr_t end; }; +enum fdt_pci_space { + FDT_PCI_SPACE_CONFIG = 0, + FDT_PCI_SPACE_IO = 0x01000000, + FDT_PCI_SPACE_MEM32 = 0x02000000, + FDT_PCI_SPACE_MEM64 = 0x03000000, + FDT_PCI_SPACE_MEM32_PREF = 0x42000000, + FDT_PCI_SPACE_MEM64_PREF = 0x43000000, +}; + +#define FDT_PCI_ADDR_CELLS 3 +#define FDT_PCI_SIZE_CELLS 2 +#define FDT_PCI_REG_SIZE \ + ((FDT_PCI_ADDR_CELLS + FDT_PCI_SIZE_CELLS) * sizeof(u32)) + +/* + * The Open Firmware spec defines PCI physical address as follows: + * + * bits# 31 .... 24 23 .... 16 15 .... 08 07 .... 00 + * + * phys.hi cell: npt000ss bbbbbbbb dddddfff rrrrrrrr + * phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh + * phys.lo cell: llllllll llllllll llllllll llllllll + * + * where: + * + * n: is 0 if the address is relocatable, 1 otherwise + * p: is 1 if addressable region is prefetchable, 0 otherwise + * t: is 1 if the address is aliased (for non-relocatable I/O) below 1MB + * (for Memory), or below 64KB (for relocatable I/O) + * ss: is the space code, denoting the address space + * bbbbbbbb: is the 8-bit Bus Number + * ddddd: is the 5-bit Device Number + * fff: is the 3-bit Function Number + * rrrrrrrr: is the 8-bit Register Number + * hhhhhhhh: is a 32-bit unsigned number + * llllllll: is a 32-bit unsigned number + */ +struct fdt_pci_addr { + u32 phys_hi; + u32 phys_mid; + u32 phys_lo; +}; + /** * Compute the size of a resource. * @@ -258,6 +302,60 @@ fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, const char *prop_name, fdt_size_t *sizep); /** + * Look at an address property in a node and return the pci address which + * corresponds to the given type in the form of fdt_pci_addr. + * The property must hold one fdt_pci_addr with a lengh. + * + * @param blob FDT blob + * @param node node to examine + * @param type pci address type (FDT_PCI_SPACE_xxx) + * @param prop_name name of property to find + * @param addr returns pci address in the form of fdt_pci_addr + * @return 0 if ok, negative on error + */ +int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, + const char *prop_name, struct fdt_pci_addr *addr); + +/** + * Look at the compatible property of a device node that represents a PCI + * device and extract pci vendor id and device id from it. + * + * @param blob FDT blob + * @param node node to examine + * @param vendor vendor id of the pci device + * @param device device id of the pci device + * @return 0 if ok, negative on error + */ +int fdtdec_get_pci_vendev(const void *blob, int node, + u16 *vendor, u16 *device); + +/** + * Look at the pci address of a device node that represents a PCI device + * and parse the bus, device and function number from it. + * + * @param blob FDT blob + * @param node node to examine + * @param addr pci address in the form of fdt_pci_addr + * @param bdf returns bus, device, function triplet + * @return 0 if ok, negative on error + */ +int fdtdec_get_pci_bdf(const void *blob, int node, + struct fdt_pci_addr *addr, pci_dev_t *bdf); + +/** + * Look at the pci address of a device node that represents a PCI device + * and return base address of the pci device's registers. + * + * @param blob FDT blob + * @param node node to examine + * @param addr pci address in the form of fdt_pci_addr + * @param bar returns base address of the pci device's registers + * @return 0 if ok, negative on error + */ +int fdtdec_get_pci_bar32(const void *blob, int node, + struct fdt_pci_addr *addr, u32 *bar); + +/** * Look up a 32-bit integer property in a node and return it. The property * must have at least 4 bytes of data. The value of the first cell is * returned. @@ -683,17 +781,6 @@ int fdt_get_named_resource(const void *fdt, int node, const char *property, struct fdt_resource *res); /** - * Look at the reg property of a device node that represents a PCI device - * and parse the bus, device and function number from it. - * - * @param fdt FDT blob - * @param node node to examine - * @param bdf returns bus, device, function triplet - * @return 0 if ok, negative on error - */ -int fdtdec_pci_get_bdf(const void *fdt, int node, int *bdf); - -/** * Decode a named region within a memory bank of a given type. * * This function handles selection of a memory region. The region is |