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-rw-r--r--include/configs/rcar-gen3-common.h29
-rw-r--r--include/configs/salvator-x.h54
-rw-r--r--include/configs/ulcb.h76
3 files changed, 10 insertions, 149 deletions
diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h
index 6deed0dcd7..2815e241de 100644
--- a/include/configs/rcar-gen3-common.h
+++ b/include/configs/rcar-gen3-common.h
@@ -31,6 +31,11 @@
#define CONFIG_ARCH_CPU_INIT
+/* Generic Interrupt Controller Definitions */
+#define CONFIG_GICV2
+#define GICD_BASE 0xF1010000
+#define GICC_BASE 0xF1020000
+
/* console */
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
@@ -43,30 +48,12 @@
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
#define DRAM_RSV_SIZE 0x08000000
-#if defined(CONFIG_R8A7795)
#define CONFIG_NR_DRAM_BANKS 4
-#define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE)
-#define PHYS_SDRAM_1_SIZE (0x40000000u - DRAM_RSV_SIZE)
-#define PHYS_SDRAM_2 0x500000000
-#define PHYS_SDRAM_2_SIZE 0x40000000u
-#define PHYS_SDRAM_3 0x600000000
-#define PHYS_SDRAM_3_SIZE 0x40000000u
-#define PHYS_SDRAM_4 0x700000000
-#define PHYS_SDRAM_4_SIZE 0x40000000u
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
-#elif defined(CONFIG_R8A7796)
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE)
-#define PHYS_SDRAM_1_SIZE (0x80000000u - DRAM_RSV_SIZE)
-#define PHYS_SDRAM_2 0x0600000000
-#define PHYS_SDRAM_2_SIZE 0x80000000u
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
-#endif
+#define CONFIG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE)
+#define CONFIG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE)
#define CONFIG_SYS_LOAD_ADDR 0x48080000
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_SDRAM_SIZE
+#define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE)
#define CONFIG_SYS_MONITOR_BASE 0x00000000
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h
index 77a12de963..33624e6c4e 100644
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -12,74 +12,22 @@
#undef DEBUG
-#define CONFIG_RCAR_BOARD_STRING "Salvator-X"
-
#include "rcar-gen3-common.h"
-/* SCIF */
-#define CONFIG_CONS_SCIF2
-#define CONFIG_CONS_INDEX 2
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ
-
-/* [A] Hyper Flash */
-/* use to RPC(SPI Multi I/O Bus Controller) */
-
/* Ethernet RAVB */
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
/* XTAL_CLK : 33.33MHz */
-#define RCAR_XTAL_CLK 33333333u
-#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK
-/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
-/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */
-#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
-#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2)
-#define CONFIG_S3D2_CLK_FREQ (266666666u/2)
-#define CONFIG_S3D4_CLK_FREQ (266666666u/4)
+#define CONFIG_SYS_CLK_FREQ 33333333u
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
-/* Generic Interrupt Controller Definitions */
-#define CONFIG_GICV2
-#define GICD_BASE 0xF1010000
-#define GICC_BASE 0xF1020000
-
-/* i2c */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SH
-#define CONFIG_SYS_I2C_SLAVE 0x60
-#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 1
-#define CONFIG_SYS_I2C_SH_SPEED0 400000
-#define CONFIG_SH_I2C_DATA_HIGH 4
-#define CONFIG_SH_I2C_DATA_LOW 5
-#define CONFIG_SH_I2C_CLOCK 10000000
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR 0x30
-
-/* USB */
-#ifdef CONFIG_R8A7795
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#else
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#endif
-
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ 200000000
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
#define CONFIG_SYS_MMC_ENV_DEV 1
#define CONFIG_SYS_MMC_ENV_PART 2
-/* Module stop status bits */
-/* MFIS, SCIF1 */
-#define CONFIG_SMSTP2_ENA 0x00002040
-/* SCIF2 */
-#define CONFIG_SMSTP3_ENA 0x00000400
-/* INTC-AP, IRQC */
-#define CONFIG_SMSTP4_ENA 0x00000180
-
#endif /* __SALVATOR_X_H */
diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h
index b54e63c2a2..dfd6436b3c 100644
--- a/include/configs/ulcb.h
+++ b/include/configs/ulcb.h
@@ -12,96 +12,22 @@
#undef DEBUG
-#define CONFIG_RCAR_BOARD_STRING "ULCB"
-
#include "rcar-gen3-common.h"
-/* M3 ULCB has 2 banks, each with 1 GiB of RAM */
-#if defined(CONFIG_R8A7796)
-#undef PHYS_SDRAM_1_SIZE
-#undef PHYS_SDRAM_2_SIZE
-#define PHYS_SDRAM_1_SIZE (0x40000000u - DRAM_RSV_SIZE)
-#define PHYS_SDRAM_2_SIZE 0x40000000u
-#endif
-
-/* SCIF */
-#define CONFIG_CONS_SCIF2
-#define CONFIG_CONS_INDEX 2
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_S3D4_CLK_FREQ
-
-/* [A] Hyper Flash */
-/* use to RPC(SPI Multi I/O Bus Controller) */
-
/* Ethernet RAVB */
-#define CONFIG_PHY_MICREL
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
/* XTAL_CLK : 33.33MHz */
-#define RCAR_XTAL_CLK 33333333u
-#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK
-/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
-/* CPclk 16.66MHz, S3D2 133.33MHz , S3D4 66.66MHz */
-#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
-#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2)
-#define CONFIG_S3D2_CLK_FREQ (266666666u/2)
-#define CONFIG_S3D4_CLK_FREQ (266666666u/4)
+#define CONFIG_SYS_CLK_FREQ 33333333u
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
-/* Generic Interrupt Controller Definitions */
-#define CONFIG_GICV2
-#define GICD_BASE 0xF1010000
-#define GICC_BASE 0xF1020000
-
-/* CPLD SPI */
-#define CONFIG_CMD_SPI
-#define CONFIG_SOFT_SPI
-#define SPI_DELAY udelay(0)
-#define SPI_SDA(val) ulcb_softspi_sda(val)
-#define SPI_SCL(val) ulcb_softspi_scl(val)
-#define SPI_READ ulcb_softspi_read()
-#ifndef __ASSEMBLY__
-void ulcb_softspi_sda(int);
-void ulcb_softspi_scl(int);
-unsigned char ulcb_softspi_read(void);
-#endif
-
-/* i2c */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SH
-#define CONFIG_SYS_I2C_SLAVE 0x60
-#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 1
-#define CONFIG_SYS_I2C_SH_SPEED0 400000
-#define CONFIG_SH_I2C_DATA_HIGH 4
-#define CONFIG_SH_I2C_DATA_LOW 5
-#define CONFIG_SH_I2C_CLOCK 10000000
-
-#define CONFIG_SYS_I2C_POWERIC_ADDR 0x30
-
-/* USB */
-#ifdef CONFIG_R8A7795
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
-#else
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#endif
-
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ 200000000
-
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
#define CONFIG_SYS_MMC_ENV_DEV 1
#define CONFIG_SYS_MMC_ENV_PART 2
-/* Module stop status bits */
-/* MFIS, SCIF1 */
-#define CONFIG_SMSTP2_ENA 0x00002040
-/* SCIF2 */
-#define CONFIG_SMSTP3_ENA 0x00000400
-/* INTC-AP, IRQC */
-#define CONFIG_SMSTP4_ENA 0x00000180
-
#endif /* __ULCB_H */
generated by cgit (git 2.34.1) at 2025-02-08 04:00:36 +0000