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Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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ELF relocation tables generated with linker option -pie can
be used to fixup code and data in a single loop at relocation,
removing the need for manual fixups anywhere else in the code.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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This patch fixes an error when running MAKEALL for ARM9.
On OS X /bin/sh uses builtin echo which does not utilise '-n' switch.
GNU manual for builtins recomend to use here-document style to solve
this portability issue.
This patch removes the usage of 'echo -n' and replace by here-document
style or a oneline echo command.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Peter Pearse <peter.pearse@arm.com>
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The pl01x serial driver was lacking the code to switch baudrates from the
command line. Fixed by simply saving the new baudrate and calling
serial_init() again. Also fixed CamelCase variables, I/O accessors and
comment style.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
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Adds support for the ARM quad-core Cortex-A9 processor
This system includes a motherboard(Versatile Express), daughterboard
(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet,
and flash systems work with these additions. The naming convention
is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
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Merge several sizes.h in asm/arch subdirectories into a single
asm/sizes.h file.
Fixup usage of asm/arch/sizes.h in some files to use the merged file.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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There were some #undef's of CONFIG_SYS_ARM_WITHOUT_RELOC added to a few board
configs as part of the arm relocation series; but these are not needed now as we
do not #undef what is not #defined in the first place.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Heiko Schocher <hs@denx.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
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All Kirkwood based boards are supported for this new implementation
ref: docs/README.arm-relocation
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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It is observed that, in most of the board configs the code is being
duplicated, also for any common change all board files needs update
This issue was under discussion from long on mailing list and we
converge on introducing common config file.
With this patch-
1. Total Kirkwood specific configuration code is reduced by 210 lines
2. All common configuration can be shared by multiple boards
3. Easy to manage common updates like ARM relocation changes
mv-common.h file is added to include/configs/
It contains all common configuration supported for all Kirkwood boards
The respective board configs are updated for its usage
Build tested for guruplug, mv88f6281gtw_ge, openrd_base,
rd6281a and sheevaplug
Binary execution tested for sheevaplug
Todo:
1. Other custom Kirkwood boards to be synced
2. The support to be extended for Orion5X based boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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For all Kirkwood boards so far dram_init function is duplicated
dram_init function is moved to dram.c and relevant code from all
board specific files removed
If any board needs specific dram init handling than standard one,
then, a macro CONFIG_SYS_BOARD_DRAM_INIT should be defined in
board config header file and the dram_init function can be put
in board specific source file
For ex. keymile boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Chris Moore <moore@free.fr>
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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Earlier Device Identification register was used to detect
the type for SoC, considering 88F6282 support to be added,
It is not possible to detect the same using current
algorithm.
With this patch, device ID is being read using PCIE devid
register, also valid chip revision ID will also be read and
displayed
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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mvsata_ide_initialize_port(): adjust init sequence (SStatus
should be checked only after all writes to SControl) and
return success/failure to ide_preinit().
Also, as some tests showed init durations in the hundreds
of us, raise the time-out to 01 ms to be on the safe side.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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All Kirkwood based boards are supported for this new implementation
ref: docs/README.arm-relocation
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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It is observed that, in most of the board configs the code is being
duplicated, also for any common change all board files needs update
This issue was under discussion from long on mailing list and we
converge on introducing common config file.
With this patch-
1. Total Kirkwood specific configuration code is reduced by 210 lines
2. All common configuration can be shared by multiple boards
3. Easy to manage common updates like ARM relocation changes
mv-common.h file is added to include/configs/
It contains all common configuration supported for all Kirkwood boards
The respective board configs are updated for its usage
Build tested for guruplug, mv88f6281gtw_ge, openrd_base,
rd6281a and sheevaplug
Binary execution tested for sheevaplug
Todo:
1. Other custom Kirkwood boards to be synced
2. The support to be extended for Orion5X based boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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For all Kirkwood boards so far dram_init function is duplicated
dram_init function is moved to dram.c and relevant code from all
board specific files removed
If any board needs specific dram init handling than standard one,
then, a macro CONFIG_SYS_BOARD_DRAM_INIT should be defined in
board config header file and the dram_init function can be put
in board specific source file
For ex. keymile boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Chris Moore <moore@free.fr>
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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Earlier Device Identification register was used to detect
the type for SoC, considering 88F6282 support to be added,
It is not possible to detect the same using current
algorithm.
With this patch, device ID is being read using PCIE devid
register, also valid chip revision ID will also be read and
displayed
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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mvsata_ide_initialize_port(): adjust init sequence (SStatus
should be checked only after all writes to SControl) and
return success/failure to ide_preinit().
Also, as some tests showed init durations in the hundreds
of us, raise the time-out to 01 ms to be on the safe side.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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Generalized misuse of ble within relocation and bss
initialization loops caused one iteration too many.
Instead of ble ('branch if lower or equal'), use
blo ('branch if lower').
While we're at it, fix all 'addreee' typos.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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Freescale application note AN3638 describes an update to the NXID format,
which stores MAC addresses and related data on an on-board EEPROM. The new
version adds support for up to 23 MAC addresses, instead of just 8. Since
the initial implementation of NXID had a "0" in the 'version' field, this
new version is called "v1".
Boards that are shipped with EEPROMs in the NXID v1 format should define
CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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pumping line-rate traffic though a p4080 rev.2, which
is configured to encrypt packets prior to forwarding through
an IPsec tunnel, gets this error:
of_platform ffe302000.jq: DECO: desc idx 22: LIODN error. DECO was trying
to share from itself or from another DECO but the two Non-SEQ LIODN
values didn't match or the "shared from" DECO's Descriptor required that
the SEQ LIODNs be the same and they aren't.
Since high traffic rates cause DECOs to begin to start sharing
shared descriptors amongst themselves, and DECOs inherit job queue
LIODNs when accessing shared descriptors, and a recently discovered
rev.2 h/w erratum requires all sharing job queues in a partition
have same liodn assignment, reassign the first job queue's liodn
assignment to the rest.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Manual was updated to add a new register for disabling CDQ speculation.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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We configure the controller but dont have virtual address space thus any
devices on the 4th controller are not accessible in u-boot.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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* Make the U-Boot update command sequence conditional. Helps prevent
accidental erasing if an upload or previous step fails
* Make it easier to update other FLASH banks
* Enable DDR controller cache line interleaving and bank cs0/cs1 by default
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Update the code which writes to the on-board EEPROM so that it can detect if
the write failed because the EEPROM is write-protected. Most of the 8xxx-class
Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and
similar information. With this patch, if the EEPROM is protected, the
"mac save" command will display an error message indicating that the write
has not succeeded.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled. Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.
The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.
Also configure a pin muxing to select some SSI signals, which will disable
I2C1.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Enable half drive strength, set RTT to 60Ohm and set write leveling override.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32 calculation for ENV than it should
do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it
to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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u-boot.bin can be loaded at any 4-byte aligned memory location and directly
'jumped' to using the 'go' command using the load address as the start
address. Doing so performs a 'warm boot' which skips memory initialisation
and other low-level initialisations, relocates U-Boot to upper memory and
starts U-Boot in RAM as per normal 'cold boot'
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Provides a small speed increase and prepares for fully relocatable image.
Downside is the TEXT_BASE, bss, load address etc must ALL be aligned on a
a 4-byte boundary which is not such a terrible restriction as everything
is already 4-byte aligned anyway
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Tidy up the linker script and discard some sections to save space
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Create more generic names for the symbols exported from the linker script
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By reserving space for the Global Data immediately below the stack during
assembly level initialisation, the C declaration of the static global data
can be removed, along with the 'RAM Bootstrap' function. This results in
cleaner code, and the ability to pass boot-up flags from assembler into C
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By using another register, reduce code size by one instruction
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%ebx will hold low-level boot flags and must be preserved
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Using %ebp as a return pointer prevents creating 'load anywhere' images
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To allow for 'load anywhere' images, the %ebp return pointer 'hack' must
be removed, so we cannot have two 'calls' to get_mem_size
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Progress indication is not relocation friendly so remove it in
preperation for full relocatability support
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