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2019-04-08riscv: Add a SYSCON driver for Andestech's PLICRick Chen
The Platform-Level Interrupt Controller (PLIC) block holds memory-mapped claim and pending registers associated with software interrupt. It is required for handling IPI. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-04-08riscv: qemu: enable SMPLukas Auer
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-08riscv: fu540: enable SMPLukas Auer
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-08riscv: hang if relocation of secondary harts failsLukas Auer
Print an error message and hang if smp_call_function() returns an error, indicating that relocation of the secondary harts has failed. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-04-08riscv: do not rely on hart ID passed by previous boot stageLukas Auer
RISC-V U-Boot expects the hart ID to be passed to it via register a0 by the previous boot stage. Machine mode firmware such as BBL and OpenSBI do this when starting their payload (U-Boot) in supervisor mode. If U-Boot is running in machine mode, this task must be handled by the boot ROM. Explicitly populate register a0 with the hart ID from the mhartid CSR to avoid possible problems on RISC-V processors with a boot ROM that does not handle this task. Suggested-by: Rick Chen <rick@andestech.com> Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Rick Chen <rick@andestech.com>
2019-04-08riscv: boot images passed to bootm on all hartsLukas Auer
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-08riscv: add support for multi-hart systemsLukas Auer
On RISC-V, all harts boot independently. To be able to run on a multi-hart system, U-Boot must be extended with the functionality to manage all harts in the system. All harts entering U-Boot are registered in the available_harts mask stored in global data. A hart lottery system as used in the Linux kernel selects the hart U-Boot runs on. All other harts are halted. U-Boot can delegate functions to them using smp_call_function(). Every hart has a valid pointer to the global data structure and a 8KiB stack by default. The stack size is set with CONFIG_STACK_SIZE_SHIFT. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-08riscv: save hart ID in register tp instead of s0Lukas Auer
The hart ID passed by the previous boot stage is currently stored in register s0. If we divert the control flow inside a function, which is required as part of multi-hart support, the function epilog may not be called, clobbering register s0. Save the hart ID in the unallocatable register tp instead to protect the hart ID. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-04-08riscv: delay initialization of caches and debug UARTLukas Auer
Move the initialization of the caches and the debug UART until after board_init_f_init_reserve. This is in preparation for SMP support, where code prior to this point will be executed by all harts. This ensures that initialization will only be performed once on the main hart running U-Boot. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-08riscv: implement IPI platform functions using SBILukas Auer
The supervisor binary interface (SBI) provides the necessary functions to implement the platform IPI functions riscv_send_ipi() and riscv_clear_ipi(). Use it to implement them. This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs running in supervisor mode. Support for machine mode is already available for CPUs that include the SiFive CLINT. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-08riscv: import the supervisor binary interface header fileLukas Auer
Import the supervisor binary interface (SBI) header file from Linux (arch/riscv/include/asm/sbi.h). The last change to it was in commit 6d60b6ee0c97 ("RISC-V: Device, timer, IRQs, and the SBI"). Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2019-04-08riscv: add infrastructure for calling functions on other hartsLukas Auer
Harts on RISC-V boot independently, U-Boot is responsible for managing them. Functions are called on other harts with smp_call_function(), which sends inter-processor interrupts (IPIs) to all other available harts. Available harts are those marked as available in the device tree and present in the available_harts mask stored in global data. The available_harts mask is used to register all harts that have entered U-Boot. Functions are specified with their address and two function arguments (argument 2 and 3). The first function argument is always the hart ID of the hart calling the function. On the other harts, the IPI interrupt handler handle_ipi() must be called on software interrupts to handle the request and call the specified function. Functions are stored in the ipi_data data structure. Every hart has its own data structure in global data. While this is not required at the moment (all harts are expected to boot Linux), this does allow future expansion, where other harts may be used for monitoring or other tasks. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-05Merge tag 'u-boot-imx-20190405' of git://git.denx.de/u-boot-imxTom Rini
Fixes for 2019.04 - fix bashism for MX8 - fix ethernet for MX53 - fix docs for i.MX8
2019-04-03Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
- Documentation fix
2019-04-03Merge branch '2019-04-03-master-imports'Tom Rini
- Important Khadas VIM2 fix - Build fix for macOS Mojave - Build fix for gcc-4.7 for host tools.
2019-04-03tools/Makefile: build host tools with -std=gnu99Thomas Petazzoni
Parts of the code are using C99 constructs (such as variables declared inside loops), but also GNU extensions (such as typeof), so using -std=gnu99 is necessary to build with older versions of gcc that don't default to building with gnu99. It fixes the following build failure: ./tools/../lib/crc16.c: In function "crc16_ccitt": ./tools/../lib/crc16.c:70:2: error: "for" loop initial declarations are only allowed in C99 mode for (int i = 0; i < len; i++) ^ ./tools/../lib/crc16.c:70:2: note: use option -std=c99 or -std=gnu99 to compile your code when building the host tools with gcc 4.7. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-04-03fix compile error on macOS Mojave默默
2019-04-03configs: khadas_vim2: Fix defconfigNeil Armstrong
The Khadas VIM2 defconfig was missing the USB PHY config and two other misc configs to setup dram banks and call misc_init_r. Align it on the other Amlogic SoC based boards defconfig. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-03phy: Also allow MESON_GXM for MESON_GXL_USB_PHYNeil Armstrong
The MESON_GXL_USB_PHY is also used on the Amlogic Meson GXM SoCs. Fixes: 2960e27e38 ("phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-02travis-ci: fix at91 missing boardsEugen Hristev
Fix missing at91 boards and split the at91 in two categories: at91 arm v7 at91 arm926esj which are the two main cores for the at91 architecture. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-02DTS: Fix ETH PHY reset on HSC|DDC boards (imx53)Lukasz Majewski
After the commit: "eth: dm: fec: Add gpio phy reset binding" SHA1: efd0b791069af93e9d439a70d1fe2ae8994dbbfa The FEC ETH driver switched to PHY GPIO reset performed with data defined in DTS. For the HSC|DDC boards the GPIO reset signal is active low and hence the wrong DTS description must be changed (otherwise the reset for ETH is not properly setup). Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-02cosmetic: Remove not needed string from kp_imx53.h configLukasz Majewski
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-02cosmetic: config: Remove empty #ifdefsLukasz Majewski
After running tools/moveconfig.py it turned out that for various boards there are an empty #ifdef statements. Remove them to clean u-boot source code. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-02doc: Fix outdated ohci board hook documentationKrzysztof Kozlowski
The ohci driver calls board_usb_init(), not usb_board_init(). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-04-02imx8mq_evk: README: Make the underline marker fill the whole sentenceFabio Estevam
Let the underline marker "=" fill the whole sentence for better readability. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-04-02imx8mq_evk: README: Fix a typo in the destination pathFabio Estevam
The DDR firmware binaries should be copied to '$(srctree)', so fix a typo. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-04-02imx8mq_evk: README: Need to copy bl31.bin to U-Boot source treeFabio Estevam
After building ATF it is needed to copy the generated bl31.bin file to the U-Boot source tree. Make this step explicit in the instructions. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-04-01Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
Minor fixes for the Alt board and PHY use on Gen2.
2019-04-01Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
- clk: sunxi: a10: Add CLK_AHB_GMAC
2019-04-01clk: sunxi: a10: Add CLK_AHB_GMACJagan Teki
CLK_AHB_GMAC was suppose to be part of previous commit "clk: sunxi: Implement A10 EMAC clocks" add it so-that we can get rid of sunxi_set_gate warning on boot message. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-01tools/imx8m_image.sh: remove bashismBaruch Siach
Use a single '=' to test string equality for compatibility with non-bash shells. Otherwise, if /bin/sh is dash, build fails: ./tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected operator ./tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected operator ./tools/imx8m_image.sh: 15: [: spl/u-boot-spl-ddr.bin: unexpected operator ./tools/imx8m_image.sh: 15: [: spl/u-boot-spl-ddr.bin: unexpected operator WARNING './spl/u-boot-spl-ddr.bin' not found, resulting binary is not-functional Signed-off-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Chris Spencer <christopher.spencer@sea.co.uk>
2019-04-01Merge tag 'u-boot-imx-20190401' of git://git.denx.de/u-boot-imxTom Rini
Fixes for 2019.01 - pico-imx6ul: fix after conversion - engicam boards - pico-imx7d _ README due to hang with imx-usb-loader
2019-03-31pico-imx7d: README: Recommend the usage of a USB hubFabio Estevam
Since commit 9e3c0174da842 ("pico-imx7d: Add LCD support") we started to notice some hangs in U-Boot. There is not an issue on such commit per se, but due to the LCD support the current drawn is increased and this may cause issues when powering pico-imx7d-pi from USB. Some computers may be a bit strict with USB current draw and will shut down their ports if the draw is too high. The solution for that is to use an externally powered USB hub between the board and the host computer. Add such recommendation to the README file. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-03-31configs: icorem6: Use imx6 cratch register for bootcountJagan Teki
SRAM address used for bootcount on exiting code is erasing previous count value when system reset from Linux. So use the dedicated imx6 scratch register, GPR2 to preserve the contents even if the system reset from Linux. Fixes: 4eb9aa39350e ("configs: imx6qdl_icore_mmc: Enable watchdog and bootcounter") Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2019-03-31configs: icore: Fix U-Boot proper loading from nandMichael Trimarchi
SPL on Engicam i.Core M6 boards enabled DM, so it would require some malloc() pool before relocation in order to load U-Boot proper properly. So, enable SPL malloc() pool of 0x2000 size similarly like what we have used for icore mmc defconfigs. Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-03-31ARM: imx6q_logic: Enable UUID supportAdam Ford
With UUID support, the root can now point to UUID. This makes swiching between mmc 0 and mmc 1 easier by simplying changing mmcdev between 0 and 1. From there, the scripts handle the rest. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-03-31pico-imx6ul: Fix eMMC boot after DM_MMC conversionFabio Estevam
After the DM_MMC conversion the following eMMC boot error is observed: U-Boot SPL 2019.04-rc4 (Mar 20 2019 - 18:53:28 +0000) Trying to boot from MMC1 MMC Device 0 not found spl: could not find mmc device 0. error: -19 SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### This happens because the SPL code does not initialize the SDHC pins and clock. Fix it by moving the original eMMC initialization from U-Boot proper to SPL. Reported-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Fabio Berton <fabio.berton@ossystems.com.br> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2019-03-31Merge branch 'master' of git://git.denx.de/u-bootStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-03-31Merge tag 'video-fixes-for-2019.04-rc4' of git://git.denx.de/u-boot-videoTom Rini
sunxi HDMI clock fix
2019-03-31Merge tag 'rockchip-fixes-for-2019.04' of git://git.denx.de/u-boot-rockchipTom Rini
Last-minute fixes for Rockchip for 2019.04: - reverts the deprecation of the 'download-key' detection (with a full solution pending for the next release) - applies a temporary fix for the 32bit pinctrl registers on the RK3288
2019-03-31dfu: usb: Update MAINTAINERS file regarding DFU/USB gadget supportLukasz Majewski
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-03-30ARM: rmobile: alt: Fix I2C bus numberMarek Vasut
The I2C bus number to access the PMIC is I2C 7, fix this. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30ARM: dts: rmobile: Activate I2C7 on AltMarek Vasut
Activate I2C7 on Alt to allow access to the PMIC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30ARM: rmobile: rcar-gen2: Activate bootm_sizeMarek Vasut
Commit d245059ff797 ("ARM: rmobile: rcar-gen3: Activate bootm_size") only fixed the superfluous CONFIG_SYS_BOOTMAPSZ for R-Car Gen3, even though it listed all affected boards. Apply the same fix to Gen2. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Fixes: d245059ff797 ("ARM: rmobile: rcar-gen3: Activate bootm_size") Cc: Eugeniu Rosca <erosca@de.adit-jv.com>
2019-03-30ARM: rmobile: Fix PHY LED mode register maskMarek Vasut
The PHY LED mode register mask should be 0xc000 , not 0xc0000. Correct the mask to operate on the right bits. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30ARM: rmobile: alt: Synchronize defconfigMarek Vasut
Synchronize the R8A7794 Alt defconfig, enable DM SPI, DM SPI FLASH and I2C driver support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30ARM: rmobile: alt: Remove CLK2MHZ macroMarek Vasut
The CLK2MHZ macro is unused, remove it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30ARM: rmobile: alt: Remove R8A7794_ETHERNET_BMarek Vasut
The R8A7794_ETHERNET_B config option is unused and based on the description, this is a setting which should be fully done on a DT level instead. Remove this config option. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-29Merge branch '2019-03-29-master-imports'Tom Rini
- Bugfixes: - mmc: correct the HS400 initialization process - configs: ti: Move FIT image load address to avoid overwrite - lib: time: update module enable MACRO - Add mbrugger as RPi board maintainer, correct agraf's email address.
2019-03-29lib: time: update module enable MACROKever Yang
We'd better use correct way to check if module has enabled. for we have 3 timer MACRO: - CONFIG_TIMER - CONFIG_SPL_TIMER - CONFIG_TPL_TIMER Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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