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2017-11-29ARM: uniphier: remove XIRQ pin settingsMasahiro Yamada
The XIRQ pins are now set up on the Linux side by the GPIO hogging. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29ARM: uniphier: remove IRQ settingsMasahiro Yamada
This work-around has been here in U-Boot because the AIDET and GPIO drivers were missing in the upstream Linux. Both are now available in Linus' tree: - drivers/irqchip/irq-uniphier-aidet.c - drivers/gpio/gpio-uniphier.c Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29ARM: uniphier: set CONFIG_LOGLEVEL to 6Masahiro Yamada
Print out KERN_NOTICE or higher level log messages. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: denali: sync with Linux 4.15-rc1Masahiro Yamada
I largely reworked the Denali NAND controller driver in Linux. This commit imports the improvements from Linux. The code is almost synced with Linux 4.15-rc1. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: introduce NAND_ROW_ADDR_3 flagMasahiro Yamada
Several drivers check ->chipsize to see if the third row address cycle is needed. Instead of embedding magic sizes such as 32MB, 128MB in drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up. Since nand_scan_ident() knows well about the device, it can handle this properly. The flag is set if the row address bit width is greater than 16. Delete comments such as "One more address cycle for ..." because intention is now clear enough from the code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 14157f861437ebe2d624b0a845b91bbdf8ca9a2d]
2017-11-29mtd: nand: add a shorthand to generate nand_ecc_caps structureMasahiro Yamada
struct nand_ecc_caps was designed as flexible as possible to support multiple stepsizes (like sunxi_nand.c). So, we need to write multiple arrays even for the simplest case. I guess many controllers support a single stepsize, so here is a shorthand macro for the case. It allows to describe like ... NAND_ECC_CAPS_SINGLE(denali_pci_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15); ... instead of static const int denali_pci_ecc_strengths[] = {8, 15}; static const struct nand_ecc_step_info denali_pci_ecc_stepinfo = { .stepsize = 512, .strengths = denali_pci_ecc_strengths, .nstrengths = ARRAY_SIZE(denali_pci_ecc_strengths), }; static const struct nand_ecc_caps denali_pci_ecc_caps = { .stepinfos = &denali_pci_ecc_stepinfo, .nstepinfos = 1, .calc_ecc_bytes = denali_calc_ecc_bytes, }; Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: a03c60178c181767ecfb26fb311a88742d228118]
2017-11-29mtd: nand: add generic helpers to check, match, maximize ECC settingsMasahiro Yamada
Driver are responsible for setting up ECC parameters correctly. Those include: - Check if ECC parameters specified (usually by DT) are valid - Meet the chip's ECC requirement - Maximize ECC strength if NAND_ECC_MAXIMIZE flag is set The logic can be generalized by factoring out common code. This commit adds 3 helpers to the NAND framework: nand_check_ecc_caps - Check if preset step_size and strength are valid nand_match_ecc_req - Match the chip's requirement nand_maximize_ecc - Maximize the ECC strength To use the helpers above, a driver needs to provide: - Data array of supported ECC step size and strength - A hook that calculates ECC bytes from the combination of step_size and strength. By using those helpers, code duplication among drivers will be reduced. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 2c8f8afa7f92acb07641bf95b940d384ed1d0294]
2017-11-29mtd: nand: Pass the CS line to ->setup_data_interface()Boris Brezillon
Some NAND controllers can assign different NAND timings to different CS lines. Pass the CS line information to ->setup_data_interface() so that the NAND controller driver knows which CS line is concerned by the setup_data_interface() request. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 104e442a67cfba4d0cc982384761befb917fb6a1] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: allow drivers to request minimum alignment for passed bufferMasahiro Yamada
In some cases, nand_do_{read,write}_ops is passed with unaligned ops->datbuf. Drivers using DMA will be unhappy about unaligned buffer. The new struct member, buf_align, represents the minimum alignment the driver require for the buffer. If the buffer passed from the upper MTD layer does not have enough alignment, nand_do_*_ops will use bufpoi. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 477544c62a84d3bacd9f90ba75ffc16c04d78071]
2017-11-29mtd: nand: Wait for PAGEPROG to finish in drivers setting ↵Boris Brezillon
NAND_ECC_CUSTOM_PAGE_ACCESS Drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS are supposed to handle the full read/write page sequence, and waiting for a page to actually be programmed is part of this write-page sequence. This is also what is done in ->write_oob_xxx() hooks, so let's do that in ->write_page_xxx() as well to make it consistent. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 41145649f4acb30249b636b945053db50c9331c5] [masahiro: There is no driver setting NAND_ECC_CUSTOM_PAGE_ACCESS in U-Boot. No driver is affected by this change.] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Drop the ->errstat() hookBoris Brezillon
The ->errstat() hook is no longer implemented NAND controller drivers. Get rid of it before someone starts abusing it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 7d135bcced20be2b50128432c5426a7278ec4f6d] [masahiro: modify davinci_nand.c for U-Boot] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Drop unused cached programming supportBoris Brezillon
Cached programming is always skipped, so drop the associated code until we decide to really support it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 0b4773fd1649e0d418275557723a7ef54f769dc9] [masahiro: modify davinci_nand.c for U-Boot] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: add mtd_ooblayout_xxx() helper functionsBoris Brezillon
In order to make the ecclayout definition completely dynamic we need to rework the way the OOB layout are defined and iterated. Create a few mtd_ooblayout_xxx() helpers to ease OOB bytes manipulation and hide ecclayout internals to their users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 75eb2cec251fda33c9bb716ecc372819abb9278a] [masahiro: cherry-pick more code from adbbc3bc827eb1f43a932d783f09ba55c8ec8379] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Support controllers with custom pageMarc Gonzalez
If your controller already sends the required NAND commands when reading or writing a page, then the framework is not supposed to send READ0 and SEQIN/PAGEPROG respectively. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 3371d663bb4579f1b2003a92162edd6d90edd089] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Add a few more timings to nand_sdr_timingsBoris Brezillon
Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the nand_sdr_timings struct. Assign default/safe values for the statically defined timings, and extract them from the ONFI parameter table if the NAND is ONFI compliant. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> [Linux commit: 204e7ecd47e26cc12d9e8e8a7e7a2eeb9573f0ba Fixup commit: 6d29231000bbe0fb9e4893a9c68151ffdd3b5469] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Fix data interface configuration logicBoris Brezillon
When changing from one data interface setting to another, one has to ensure a specific sequence which is described in the ONFI spec. One of these constraints is that the CE line has go high after a reset before a command can be sent with the new data interface setting, which is not guaranteed by the current implementation. Rework the nand_reset() function and all the call sites to make sure the CE line is asserted and released when required. Also make sure to actually apply the new data interface setting on the first die. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection") Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> [Linux commit: 73f907fd5fa56b0066d199bdd7126bbd04f6cd7b] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: automate NAND timings selectionBoris Brezillon
The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers have to implement the same timings selection dance. Also currently NAND devices can be resetted at arbitrary places which also resets the timing for ONFI chips to timing mode 0. Provide a common logic to select the best timings based on ONFI or ->onfi_timing_mode_default information. Hook this into nand_reset() to make sure the new timing is applied each time during a reset. NAND controller willing to support timings adjustment should just implement the ->setup_data_interface() method. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Expose data interface for ONFI mode 0Sascha Hauer
The nand layer will need ONFI mode 0 to use it as timing mode before and right after reset. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 6e1f9708dbf3c50a8da93c1952a01a7a2acb5e66] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: convert ONFI mode into data interfaceSascha Hauer
struct nand_data_interface is the designated type to pass to the NAND drivers to configure the timing. To simplify further patches convert the onfi_sdr_timings array from type struct nand_sdr_timings nand_data_interface. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: b1dd3ca203fccd111926c3f6ac59bf903ec62b05] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Introduce nand_data_interfaceSascha Hauer
Currently we have no data structure to fully describe a NAND timing. We only have struct nand_sdr_timings for NAND timings in SDR mode, but nothing for DDR mode and also no container to store both types of timing. This patch adds struct nand_data_interface which stores the timing type and a union of different timings. This can be used to pass to drivers in order to configure the timing. Add kerneldoc for struct nand_sdr_timings while touching it anyway. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: eee64b700e26b9bcc6fce024681c31f5e12271fc] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Create a NAND reset functionSascha Hauer
When NAND devices are resetted some initialization may have to be done, like for example they have to be configured for the timing mode that shall be used. To get a common place where this initialization can be implemented create a nand_reset() function. This currently only issues a NAND_CMD_RESET to the NAND device. The places issuing this command manually are replaced with a call to nand_reset(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 2f94abfe35b210e7711af9202a3dcfc9e779219a] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: remove unnecessary 'extern' from function declarationsSascha Hauer
'extern' is not necessary for function declarations. To prevent people from adding the keyword to new declarations remove the existing ones. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 79022591839f110f465cac0223e117b91d47d5db] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: Add an option to maximize the ECC strengthBoris Brezillon
The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strength to match a bootloader/firmware config, but might also be used to get a better reliability. In the latter case, the user might want to use the maximum ECC strength without having to explicitly calculate the exact value (this value not only depends on the OOB size, but also on the NAND controller, and can be tricky to extract). Add a generic 'nand-ecc-maximize' DT property and the associated NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best ECC strength and step-size on their own. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> [Linux commit: ba78ee00e1ff84de9b3ad33edbd3ec599099ee82] [masahiro: of_property_read_bool -> fdt_getprop for U-Boot] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29mtd: nand: add onfi_* stubs in case ONFI_DETECTION is disabledMasahiro Yamada
Add stubs to the header in case CONFIG_SYS_NAND_ONFI_DETECTION is disabled. This is much easier than adding around #ifdef to the caller side. Also, I removed the #ifdef around onfi_params. In Linux, onfi_params and jedec_params are unified as union. It will be the right thing to do. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29bitops: collect BIT macros to include/linux/bitops.hMasahiro Yamada
Same macros are defined in various places. Collect them into include/linux/bitops.h like Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29ARM: openrd: set CONFIG_LOGLEVEL to 2Masahiro Yamada
These boards are on the boundary of "u-boot-nodtb.bin exceeds file size limit" error. Reduce the log-level to save memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-27test: Correct operation when tests passSimon Glass
When tests pass an error message is printed because of a variable that is not initialised. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-11-27spl: TI: Do not default to SPL_FIT_IMAGE_TINY being enabledTom Rini
This option prevents booting on am335x_evm at least along with most likely other platforms. Fixes: 337bbb629777 ("spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-size") Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-27Merge git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-27configs: icore-rqs: Enable falcon modeJagan Teki
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27engicam: imx6q: Return mmc dev 0 for icoreJagan Teki
icorem6 has sd on usdhci1 which is devno 0 so return proper devno from board_mmc_get_env_dev for icorem6 and icorem_6rqs Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6: engicam: Add imx6q/imx6ul boards for existing boardsJagan Teki
Add new board names for existing board support imx6q - icore and icore_rqs boards imx6ul - geam6ul and isiot boards Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27board: icore-rqs: Fix mmc get env deviceJagan Teki
As per USDHC boot eFUSE descriptions: USDHC3 => devno 2 USDHC4 => devno 3 Linux will detect mmc0, mmc1, mmc2 based on the status "okay" on usdhc so imx6qdl-icore-rqs.dtsi has enabled usdhc1, usdhc3 and usdhc4.But U-Boot can detect based on the aliases so add mmc1, mmc2 for usdhc3 and usdhc4 respectively and return the board_mmc_get_env_dev by subtracting -1 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6UL: icore: Add SPL_OF_CONTROL supportJagan Teki
Add OF_CONTROL support for SPL code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27pinctrl: imx6ul: Fix pinctrl data overlapped with DT areaJagan Teki
before relocation pinctrl data BSS is overlapping DT area, when .data is using uninitialized global variable, imx6_pinctrl_soc_info. So assign them flags ZERO_OFFSET_VALID to prevent BSS overlap Suggested-by: Lokesh Vutla <lokeshvutla@ti.com> Reported-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6Q: icore: Add SPL_OF_CONTROL supportJagan Teki
Add OF_CONTROL support for SPL code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6Q: icorem6: Move spl load fit to common/splJagan Teki
Move spl load fit code into common/spl Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27i.MX6: engicam: Move set_fdt_file to commonJagan Teki
setenv_fdt_file to common code and set dtb based on CONFIG_DEFAULT_DEVICE_TREE and cpu_type. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27mx6sxsabresd: Use PARTUUID to specify the rootfs locationFabio Estevam
mx6sxsabresd can run different kernel versions, such as NXP 4.1 or mainline. Currently the rootfs location is passed via mmcblk number and the problem with this approach is that the mmcblk number for the SD card changes depending on the kernel version. In order to avoid such issue, use the UUID method to specify the rootfs location. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2017-11-27imx: Remove boolean parameter from wdog powerdown functionFabio Estevam
imx_set_wdog_powerdown() is always used to disable the power down enable bit, so remove the boolean parameter of the function. It is also a bit strange to write a boolean value into registers, so this new version makes explicit that we are writing 0. While at it, rename it to imx_wdog_disable_powerdown(). Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-11-27imx: Also clear powerdown enable bit for WDOG3 on i.MX6ULLFabio Estevam
Clear powerdown enable bit for WDOG3 on i.MX6ULL to avoid unwanted kernel reboots. Suggested-by: Ye Li <ye.li@nxp.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-11-27mx6ull: Fix WDOG3 base addressFabio Estevam
i.MX6ULL has the same WDOG3 base address as i.MX6UL, so take this into account in the base address definition. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-11-26Merge git://git.denx.de/u-boot-rockchipTom Rini
2017-11-26rockchip: defconfig: puma-rk3399: bypass ADC-based boot_mode checkPhilipp Tomsich
The boot (and fallback/emergency boot) concept for the RK3399-Q7 differs from Rockchip's reference platforms. On the RK3399-Q7, some of this functionality is present in the bootloader itself (and configurable); some is backed in hardware by the Qseven BIOS_DISABLE signal to invoke the final stages of fallbacks (i.e. either an external boot bypassing on-module memories or falling back to the BROM for USB recovery). In summary: the ADC-based boot_mode check does not apply for the RK3399-Q7 and we therefore disable it (in this commit) by setting CONFIG_BOOT_MODE_REG to 0. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26rockchip: fix turning off boot-mode via KconfigPhilipp Tomsich
The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will show as 0x0 if a default is provided and changed via Kconfig. However, it still will show as 0, if no default is given. Consequently, the "is set to something other than 0" test in a Makefile is cumbersome. Instead this check can easily be performed in the C-code. This removes the ifeq-check from mach-rockchip/Makefile, adds a matching #if-check to boot_mode.c and fixes resulting link issues (if boot_mode.o was not included due to the Makefile check) by defining a stub function (in case the functionality is not built in) for setup_boot_mode in boot_mode.c. Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26rockchip: pinctrl: rk3399: add support for I2C8Philipp Tomsich
The RK3399 has a total of 9 I2C controllers. To support these, the enum in periph.h is extended and the mapping from the IRQ numbers to the peripheral-ids is extended to ensure that pinctrl requests are passed through to the function configuring the I2C pins. For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using communication with the FAN53555 connected on I2C8. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-11-26rockchip: clk: rk3399: change extract_bits to bitfield_extractPhilipp Tomsich
The RK3399 clk driver still has a left-over use of extract_bits, which can be replaced by using bitfield_extract from include/bitfield.h. This rewrites the invocation to use the shared function. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-sizePhilipp Tomsich
A minor code-size increase from the changes for tracking the os-type of FIT images and from infrastructure for recording the loadables into the the loaded FDT, broke the builds for sun50i and some OMAP2+ devices. This change adds a new config option (enabled by default for MACH_SUN50I, MACH_SUN50I_H5 and ARCH_OMAP2PLUS) that does skips these processing steps (bringing code size down to below the limit again). The os-type is not evaluated, but assumed to be IH_OS_UBOOT (i.e. taking the code-paths intended for backward-compatibility). Note that enabling this config option precludes any useful downstream processing, such as utilising a special calling convention for ATF or OPTEE, based on the os-type of the loadables. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26rockchip: defconfig: lion-rk3368: sync up with SPL changes for ATFPhilipp Tomsich
This tracks the SPL changes for ATF for the RK3368-uQ7: * renames ATF_SUPPORT to ATF * drops CONFIG_SPL_ATF_TEXT_BASE (now dynamically retrieved from the .itb file) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26rockchip: defconfig: puma-rk3399: sync up with SPL changes for ATFPhilipp Tomsich
This defconfig update makes use of the new features: * CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is now set to 0, as there is no overlap between the M0 firmware and the ATF (we load this to DRAM and relocate it to its final location within the ATF) * tracks the ATF_SUPPORT -> ATF renaming Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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