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2020-01-07dts: Add support for adding DT overlays in u-boot.imgJean-Jacques Hiblot
If u-boot.img is a FIT image, CONFIG_OF_OVERLAY_LIST can be used to add DT overlays to u-boot.img. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07include: board: provide empty stubs when the BOARD option is not selectedJean-Jacques Hiblot
Useful to avoid #ifdef throughout the code that uses the board driver API. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07drivers: board: Add get_fit_loadable()Jean-Jacques Hiblot
This function will be used by the SPL to get the names of images to load from the FIT. This allows to load different images based on runtime HW detection. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07drivers: board: Make the board drivers available in SPLJean-Jacques Hiblot
Make the board driver available in the SPL too. The board driver is a way to provide useful information about the board and that can be useful in the SPL too. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07spl: fit: constify the output parameter of spl_fit_get_image_name()Jean-Jacques Hiblot
There is no need for it to be non-constant. Making it constant, allows to return constant string without warning. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07Makefile.lib: include /__symbols__ in dtb if SPL_LOAD_FIT_APPLY_OVERLAY is ↵Jean-Jacques Hiblot
enabled In order to apply an overlay to a DTB. The DTB must have been generated with the option '-@'. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07spl: fit: be more verbose when an error occurs when applying the overlaysJean-Jacques Hiblot
There are many ways the overlay application can fail. 2 of them are probably the most common: - the application itself failed. Usually this is comes from an unresolved reference - DTBO not available in FIT (could be because of a typo) In both case it is good to be more explicit about the error and at least show which overlay is failing. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07spl: fit: Do not fail immediately if an overlay is not availableJean-Jacques Hiblot
If one overlay that must be applied cannot be found in the FIT, the current implementation stops applying the overlays. Let's make it skip only the failing overlay instead. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07spl: fit: allocate a temporary buffer to load the overlaysJean-Jacques Hiblot
If the node describing an overlay does not specify a load address, it will be loaded at the address previously used. Fixing it by allocating a temporary buffer that will be used as a default load address. By default, the size of the buffer is 64kB which should be plenty for most use cases. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07spl: fit: Make room in the FDT before applying overlaysJean-Jacques Hiblot
Make room in the FDT before applying the overlay, otherwise it may fail if the overlay is big. As the exact added size is not known in advance, just add the size of the overlay. Move after the end of the application of the overlays, the resize of the FDT for the injection of the details on the loadables. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07spl: fit: Add support for applying DT overlayMichal Simek
doc/uImage.FIT/overlay-fdt-boot.txt is describing how to create FIT image with DT overlays in it. Add support for this feature to SPL. Here is the ZynqMP fragment where dtb points to full DT and dtbo is overlay which should be applied on the top of dtb. config { description = "ATF with full u-boot overlay"; firmware = "atf"; loadables = "uboot"; fdt = "dtb", "dtbo"; }; The whole feature depends on OF_LIBFDT_OVERLAY which is adding +4kB code and 0 for platforms which are not enabling this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07spl: fit: don't load the firmware twiceJean-Jacques Hiblot
When u-boot.img is a FIT image generated automatically by mkimage, the configuration node has the following structure: conf-1 { description = "k3-am654-base-board"; firmware = "firmware-1"; loadables = "firmware-1"; fdt = "fdt-1"; }; The firmware is referenced twice. Once by the 'firmware' property and once by the 'loadables' property. Currently this result in the firmware being loaded twice. This is not a big problem but has an impact on the boot time. Fixing it by not loading a loadable image if it is also the firmware image. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Andreas Dannenberg <dannenberg@ti.com>
2020-01-07tools: dumpimage: Fall-though to print usage for help commandAndrew F. Davis
This has the same result but some compilers will warn about this fall-through if there are statements as part of the label block. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-07tools: fit_image: Use fit_image_get_data_and_size for getting offset/sizeAndrew F. Davis
This is very similar to fit_image_get_data but has the benefit of working on FIT images with external data unlike fit_image_get_data. This is useful for extracting sub-images from type of FIT image as this would previously just silently fail. Add an error message also so if this still fails it is easier to find out why. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-07tools: dumpimage: Provide more feedback on internal errorsAndrew F. Davis
The dumpimage utility errors out in a number of places without providing sufficient feedback to allow the user to easily determine what has gone wrong. Add additional error messages to make the cause of the failure more obvious. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-07board: amlogic: select PWRSEQ for all amlogic platformAnand Moon
commit a10388dc6982 ("mmc: meson-gx: add support for mmc-pwrseq-emmc") introduce CONFIG_PWRSEQ for power sequence for eMMC module on amlogic platform, so enable this to all amlogic boards. Signed-off-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-01-07configs: meson64: enable GIC support for G12A/G12BAnand Moon
Enable GIC support for G12A/G12B platform. Signed-off-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-01-07boards: amlogic: add Khadas VIM3L supportChristian Hewitt
Khadas VIM3L uses the same board layout as VIM3, but with an S905D3 chip instead of A311D. Board config is derived from khadas-vim3_defconfig and sei610_defconfig. README is based on README.khadas-vim3; the difference is that VIM3L uses FIP files from the g12a folder in vendor sources not the g12b folder. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: added vim3l readme into w400 MAINTAINERS]
2020-01-07Merge tag 'u-boot-imx-20200107' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx New for 2020.04 --------------- - New boards Embedded Artists COM board Xea Board - Switch to DM: Aristainetos boards Toradex colibri (DM_ETH) iCubox GE bx50v3 mx7dsabre (DM_ETH) cx9020 - New features: Bootaux with elf files Default SYS_THUMB_BUILD for i.MX6/7 - Fixes: DHCOM i.MX6 PDK Engicam i.MX8M tools (imx8m_image) Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/633679664
2020-01-07Merge tag 'u-boot-atmel-2020.04-a' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel features for 2020.04 cycle This feature set is a patch series from Tudor Ambarus which includes parsing of the spi flash SFDP parser for SST flashes, and using those tables to retrieve unique saved per device MAC address. This is then used as base mac address on the SAMA5D2 Wireless SOM EK board.
2020-01-07ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC AccessThor Thayer
The ECC registers in the SDRAM HMC Adapter should always be accessible (both when ECC is enabled and disabled). Currently, the registers are accessible only when ECC is enabled. The ECC Enabled bit is used to determine the status of ECC by later OSes so always allow access. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-01-07arm: socfpga: stratix10: Enable SMMU accessThor Thayer
Enable TCU access through the Stratix10 CCU so that the SMMU can access the SDRAM. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-01-07configs: socfpga: fix building Stratix10 and AgilexSimon Goldschmidt
This fixes a merge error that accidentally left CONFIG_MTD_DEVICE active by removing it from the config file. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Enable Agilex SoC buildLey Foon Tan
Add build support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07configs: socfpga: Move Stratix10 and Agilex common CONFIGsLey Foon Tan
Move Stratix10 and Agilex common CONFIGs to socfpga_soc64_common.h. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: dts: agilex: Add base dtsi and devkit dtsLey Foon Tan
Add device tree files for Agilex SoC platform. socfpga_agilex-u-boot.dtsi and socfpga_agilex_socdk-u-boot.dts contains Uboot specific DT properties. socfpga_agilex.dtsi and socfpga_agilex_socdk.dts are from Linux (kernel/git/dinguyen/linux.git, commit 6f0bf971bacacc) Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add SPL for Agilex SoCLey Foon Tan
Add SPL support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07board: intel: agilex: Add socdk board support for Intel Agilex SoCLey Foon Tan
Add socdk board support for Intel Agilex SoC Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07ddr: altera: agilex: Add SDRAM driver for AgilexLey Foon Tan
Add SDRAM driver for Agilex SoC. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07ddr: altera: Restructure Stratix 10 SDRAM driverLey Foon Tan
Restructure Stratix 10 SDRAM driver. Move common code to separate file, in preparation to support SDRAM driver for Agilex. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: agilex: Add clock handoff offset for AgilexLey Foon Tan
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07cache: Add Arteris Ncore cache coherent unit driverLey Foon Tan
Add Cache Coherency Unit (CCU) driver. CCU is to ensures consistency of shared data between multi masters in the system. Driver initializes CCU's directories and coherency agent interfaces in CCU IP. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add clock wrapper functionsLey Foon Tan
Add clock wrapper functions call to clock DM functions to get clock frequency and used in cm_print_clock_quick_summary(). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07clk: agilex: Add clock driver for AgilexLey Foon Tan
Add clock manager driver for Agilex. Provides clock initialization and get_rate functions. agilex-clock.h is from Linux commit ID cd2e1ad12247. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHzLey Foon Tan
CLKMGR_INTOSC_HZ should be 400MHz, instead of 460MHz. Removed also unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Move Stratix10 and Agilex clock manager common codeLey Foon Tan
Move Stratix10 and Agilex clock manager common code to new header file. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add system manager supportLey Foon Tan
Add system manager support for Agilex. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Move Stratix10 and Agilex system manager common codeLey Foon Tan
Move Stratix10 and Agilex system manager common code to system_manager_soc64.h. Changed macros to use SYSMGR_SOC64_*. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add reset manager supportLey Foon Tan
Add reset manager support for Agilex. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Move Stratix10 and Agilex reset manager common codeLey Foon Tan
Move Stratix10 and Agilex reset manager common code to reset_manager_soc64.h. Changed macros to RSTMGR_SOC64_*. Remove unused RSTMGR_XXX defines. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Move firewall code to firewall fileLey Foon Tan
Move firewall related code to new firewall.c, to share code in Stratix 10 and Agilex. SDMMC will transfer data to OCRAM in SPL. So, enable privilege for SDMMC to allow DMA transfer to OCRAM. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add base address for Intel Agilex SoCLey Foon Tan
Add base address for Intel Agilex SoC. Reuse base_addr_s10.h for Agilex, only one base address is different from S10. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Convert clock manager from struct to definesLey Foon Tan
Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get clock manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Convert system manager from struct to definesLey Foon Tan
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get system manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Convert reset manager from struct to definesLey Foon Tan
Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get reset manager base address from DT node instead of using #define. spl_early_init() initializes the DT setup. So, move spl_early_init() to beginning of function and before get base address from DT. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: dts: socfpga: Add u-boot, dm-pre-reloc for sysmgr and clkmgr nodesLey Foon Tan
Add u-boot,dm-pre-reloc for sysmgr and clkmgr nodes to use it in SPL. In preparation to get base address from DT. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07spl: Allow cache drivers to be used in SPLLey Foon Tan
Add an option for building cache drivers in SPL. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07ARM: dts: Import Khadas VIM3L DT from Linux 5.5-rc1Christian Hewitt
Import the Khadas VIM3L device-tree from [1] [1] e42617b825f8 ("Linux 5.5-rc1") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-01-07video: meson: Drop unnecessary header includesSimon Glass
These files should not be included in meson header files. Drop them and tidy up the affected C files. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-01-07ARM: mxs: spl_boot.c: make early_delay more robustRasmus Villemoes
It's true that booting normally doesn't take long enough for the register to roll (which actually happens in a little over an hour, not just a few seconds). However, the counter starts at power-on, and if the board is held in reset to be booted over USB, one actually risks hitting wrap-around during boot, which can both result in too short delays (if the "st += delay" calculation makes st small) and theoretically also unbound delays (if st ends up being UINT_MAX and one just misses sampling digctl_microseconds at that point). It doesn't take more code to DTRT, and once bitten, twice shy. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
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