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2018-08-13ARM: socfpga: Remove adhoc ethernet reset and configurationMarek Vasut
Remove ad-hoc ethernet syscon registers configuration and reset support. Reset is now handled by the reset framework and the syscon registers are set in the dwmac_socfpga.c driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: Zap unused reset codeMarek Vasut
Remove code from the reset manager that is never called. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13net: designware: socfpga: Add Arria10 extrasMarek Vasut
Add wrapper around the designware MAC driver to handle the SoCFPGA specific configuration bits. On Arria10, this is configuration of syscon phy_intf. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-08-13ARM: socfpga: Zap all the UART handling complexityMarek Vasut
The UART reset handling is now done via reset framework using the SoCFPGA reset driver. The UART console assignment is done using the DM and console framework. Nuke all this comlexity, since it is just duplicating the same functionality, badly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-08-13ARM: socfpga: Enable DM I2C framework on A10Marek Vasut
Enable the DM I2C framework on Arria10, so that the DM capable Designware I2C driver can handle the reset via DM reset framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: Enable DM reset framework on A10Marek Vasut
Enable the DM reset framework and DM reset driver on Arria10 both in U-Boot and in SPL. This lets U-Boot parse reset control from DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add i2c alias to A10 SoCDKMarek Vasut
The A10 SoCDK is missing the I2C bus alias, so DM I2C cannot assign the I2C bus a bus number. Add the missing alias. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add missing I2C resetsMarek Vasut
The I2Cx resets are missing from DT, so the reset manager cannot control them. Add the missing DT reset entries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Fix Arria10 GMAC resetsMarek Vasut
Add the GMAC0,1 OCP resets, which must also be ungated for those GMACs to work and add GMAC2 reset and OCP resets which were missing altogether. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Add missing UART resetsMarek Vasut
The UART0 and UART1 resets are missing from DT, so the reset manager cannot control them. Add the missing DT reset entries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: dts: socfpga: Flag reset manager on A10 as pre-relocMarek Vasut
The Altera reset manager block must be available very early on, since it controls ie. UART resets. Flag it as pre-reloc. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13ARM: socfpga: Register the FPGA on A10 in SPL againMarek Vasut
The restructuring of the SPL dropped registration of the FPGA in SPL, readd it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Fixes: c859f2a77d98 ("arm: socfpga: Restructure the SPL file")
2018-08-13arm: socfpga: gen5: combine some init code for SPL and U-BootSimon Goldschmidt
Some of the code for low level system initialization in SPL's board_init_f() and U-Boot's arch_early_init_r() is the same, so let's combine it into a single function called from both. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13arm: socfpga: fix device trees to work with DM serialSimon Goldschmidt
Device trees need to have the serial console device available before relocation and require a stdout-path in chosen at least for SPL to have a console. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13MAINTAINERS: Update STM32MP fragmentsPatrice Chotard
Add new drivers Add Christophe Kerello and myself as maintainers Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: dts: stm32f4: Fix DT dtc warningsPatrick Delaunay
This patch fix the following warnings for for stm32f429 evaluation and discovery boards: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: dts: stm32mp157: Add ADC DT nodePatrice Chotard
Add ADC device tree node. This allows to get analog conversions on stm32mp157. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: dts: stm32: remove cd-inverted for stm32f746-discoPatrice Chotard
As cd-inverted property is no more used by arm_pl180_mmci driver, remove it. Update cd-gpios active level accordingly. Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: dts: stm32: remove cd-inverted for stm32f769-discoPatrice Chotard
As cd-inverted property is no more used by arm_pl180_mmci driver, remove it. Update cd-gpios active level accordingly. Reported-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13ARM: omap3: evm: Enable CONFIG_BLK and misc. cleanupDerald D. Woods
This commit enables CONFIG_BLK and removes USB_STORAGE which is awaiting proper implementation for current U-Boot interfaces. Additionally the console selection is now handled by Kconfig and no longer needs to be in the config header. CONFIG_SYS_MALLOC_F_LEN=0x2000 was added to sync with other boards. CONFIG_SPL_BLK and CONFIG_SPL_DM_MMC are disabled because they currently do not allow the OMAP3-EVM (OMAP34XX) to actually boot. Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-08-13tpm: sandbox: fix wrong assignment with a simplificationMiquel Raynal
The recv variable in sandbox_tpm2_fill_buf() is a pointer on a pointer of a char array. It means accessing *recv is the char array pointer itself while **recv is the first character of that array. There is no need for such indirection here, so simplify the code. Simplifying things will make the last assignment right: "*recv = NULL" is now correct. The issue has been found by the following Coverity Scan report: CID 183371: Incorrect expression (UNUSED_VALUE) Assigning value "4UL" to "*recv" here, but that stored value is overwritten before it can be used. 232 *recv += sizeof(rc); 233 234 /* Add trailing \0 */ 235 *recv = NULL; While at simplifying things, use '\0' instead of NULL when adding an empty char at the end of the buffer. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-13tpm: sandbox: fix wrong check on pcr_mapMiquel Raynal
The second check on pcr_map in sandbox_tpm2_xfer() is wrong. It should check for pcr_map not being empty. Instead, it is a pure copy/paste of the first check which is redundant. This has been found thanks to a Coverity Scan report: CID 183370: Memory - illegal accesses (UNINIT) Using uninitialized value "pcr_index". put_unaligned_be32(tpm->pcr_extensions[pcr_index], recv); This is because pcr_index is initialized only if the user input is correct, ie. at least one valid bit is set in pcr_map. Fix the second check and also initialize pcr_index to 0 (which is harmless in case of error) to make Coverity Scan happy. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-13MAINTAINERS: Add more sources to Arch SnapdragonRamon Fried
Add scattered driver files around the source tree that belongs to Snapdragon arch. Not sure why they were not included in the first place. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13db410c: add FIT supportRamon Fried
1. Add FIT support for DB410c defconfig. 2. Don't overwrite bootargs (they're already defined in Linux device tree for DB410c. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13db410: alter WLAN/BT MAC address fixupRamon Fried
Change the way MAC address fixup is done: 1. Stop using LK handed device-tree and calculate the MAC address our own. 2. Allow overriding the generated MACS with environment variables: "wlanaddr" and "btaddr". Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13snapdragon: added MAC generation functionsRamon Fried
Add support for generation of unique MAC address that is derived from board serial. Algorithm for generation of MAC taken from LK. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13snapdragon: added msm_board_serial() funcRamon Fried
This commit adds a function to get the board serial number. In snapdragon it's actually the eMMC serial number. Function added in a new file misc.c that will include further snapdragon miscellaneous functions. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-08-13stm32f7: board: Fix memory initPatrice Chotard
Commit 1473b12ad0b3 ("lib: fdtdec: Update ram_base to store ram start adddress") brings regression on STM32F7 which can't boot. Use fdtdec_setup_mem_size_base() to setup memory base and size. Use fdtdec_setup_memory_banksize() to setup memory bank base and size. Reported-by: Mark Olsson <mark@markolsson.se> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Cc: Mark Olsson <mark@markolsson.se> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-08-13configs: stm32f429-evaluation: Add DISTRO_DEFAULT supportPatrice Chotard
Add DISTRO_DEFAULT support to be able to boot on mmc by default on boot. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32f469-discovery: Add DISTRO_DEFAULT supportPatrice Chotard
Add DISTRO_DEFAULT support to be able to boot on mmc by default on boot. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32h743-discovery: Add DISTRO_DEFAULT supportPatrice Chotard
Add DISTRO_DEFAULT support to be able to boot on mmc by default on boot. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32h743-evaluation: Add DISTRO_DEFAULT supportPatrice Chotard
Add DISTRO_DEFAULT support to be able to boot on mmc by default on boot. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32f4xx: Remove CONFIG_SYS_RAM_FREQ_DIVPatrice Chotard
Since commit bfea69ad2793 ("stm32f7: sdram: correct sdram configuration as per micron sdram"), CONFIG_SYS_RAM_FREQ_DIV flag is no more used, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32h7xx: Migrate CONFIG_CMD_CACHE to defconfigPatrice Chotard
Remove CONFIG_CMD_CACHE from include/configs/stm32h7xx.h and enable it in stm32h7xx_defconfig Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32f746-disco: Migrate CONFIG_CMD_CACHE to defconfigPatrice Chotard
Remove CONFIG_CMD_CACHE from include/configs/stm32f746-disco.h and enable it in stm32f746-disco_defconfig Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32f4xx: Enable ICACHE and DCACHEPatrice Chotard
Enable instruction and data caches. Fix boot_sd command as since commit d409c962169b ("armv7m: disable icache before linux booting"), instruction cache is automatically disable before linux booting. "icache off" from boot_sd command becomes useless, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32f429-disco: Remove CONFIG_SYS_RAM_CSPatrice Chotard
This flag is not used, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13configs: stm32fxxx: Remove CONFIG_SYS_CLK_FREQPatrice Chotard
Since commit aa5e3e22f4d6 ("board: stm32: switch to DM STM32 timer") SYS_CLK_FREQ is useless, remove it from stm32f4 and stm32f7 boards. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13board: stm32: use bi_dram[0].start instead of hardcoded valuePatrice Chotard
Use gd->bd->bi_dram[0].start initialized from DT instead of using hardcoded CONFIG_SYS_SDRAM_BASE from config file. Remove unused CONFIG_SYS_RAM_BASE and CONFIG_SYS_SDRAM_BASE defines. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-08-13clk: at91: utmi: add timeout for utmi lockEugen Hristev
In case the slow clock is not properly configured, the UTMI clock cannot lock the PLL, because UPLLCOUNT will "wait X slow clock cycles". In this case U-boot will loop indefinitely. Added a timeout in this case, to start U-boot even if UTMI clock is not enabled, so the user can use different media if needed, or investigate. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-08-13arm: bcm7445: Move config defines to bcm7445.hThomas Fitzsimmons
Move some configuration #defines that do not apply to other bcmstb boards from bcmstb.h to bcm7445.h. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
2018-08-13arm: bcm7445: Fix parallel make race conditionThomas Fitzsimmons
Move the contents of prior_stage.h into bcmstb.h to prevent a build failure when bcmstb.h is #include'ed before the asm/arch symbolic link is present. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
2018-08-13rsa: Fix LibreSSL before v2.7.0Caliph Nomble
Fix LibreSSL compilation for versions before v2.7.0. Signed-off-by: Caliph Nomble <nomble@palism.com> Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
2018-08-13fs: fix typo 'dumm'Heinrich Schuchardt
%s/dumm /dummy / Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-08-13avb2.0: add get_size_of_partition()Igor Opaniuk
Implement get_size_of_partition() operation, which is required by the latest upstream libavb [1]. [1] https://android.googlesource.com/platform/external/avb/+/android-p-preview-5 Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org> Acked-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-08-13Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-08-13arm: socfpga: cyclone5: handle debug uartSimon Goldschmidt
If CONFIG_DEBUG_UART is enabled, correctly initialize the debug uart before console is initialized to debug early boot problems in SPL. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13arm: socfpga: spl_gen5: clean up malloc_base assignmentSimon Goldschmidt
In spl_gen5's board_init_f(), gd->malloc_base is manually assigned at the end of the function to point to sdram. This code is outdated as by now, the heap is switched to sdram by the common function spl_relocate_stack_gd() if the appropriate defines are set. As it was, the value assigned manually was directly overwritten by this common code, so remove the manual assignment. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-13arm: socfpga: fix SPL on gen5 after moving to DM serialSimon Goldschmidt
There were NULL pointers dereferenced because DM was used too early without correct initialization: - malloc_simple returned NULL when called from preloader_console_init() because gd->malloc_limit was 0 - uclass_add dereferenced gd->uclass_root members which were NULL because dm_init (or one of its relatives) has not been called. All this is fixed by calling spl_early_init before calling preloader_console_init. This fixes commit 73172753f4f3 ("ARM: socfpga: Convert to DM serial") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-08-11Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini