summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-01-27mtd: spinand: winbond: Add support for W25N01GVRobert Marko
Linux has supported W25N01GV for a long time, so lets import it. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27spi: ti_qspi: Add support for CS other than CS0Vignesh Raghavendra
Make sure corresponding setup registers are updated depending on CS. This ensures that driver can support QSPI flashes on ChipSelects other than on CS0 Reported-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27spi: prevent overriding established bus settingsMarcin Wojtas
The SPI stack relies on a proper bus speed/mode configuration by calling dm_spi_claim_bus(). However the hitherto code allowed to accidentally override those settings in the spi_get_bus_and_cs() routine. The initially established speed could be discarded by using the slave platdata, which turned out to be an issue on the platforms whose slave maximum supported frequency is not on par with the maximum frequency of the bus controller. This patch fixes above issue by configuring the bus from spi_get_bus_and_cs() only in case it was not done before. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27cmd: spi: Permit setting bus frequencyMarek Vasut
The 'sspi' command hard-coded 1 MHz bus frequency for all transmissions. Allow changing that at runtime by specifying '@freq' bus frequency in Hz. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27test: dm: spi: Fix sandbox dm_test_spi_find()Bin Meng
Per sandbox_cs_info(), sandbox spi controller only supports chip select 0. Current test case tries to locate devices on chip select 1, and any call to spi_get_bus_and_cs() or spi_cs_info() with cs number 1 should not return 0. This updates the test case to handle it correctly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27dm: spi: Check cs number before accessing slavesBin Meng
Add chip select number check in spi_find_chip_select(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
2020-01-27spi: nxp_fspi: new driver for the FlexSPI controllerMichael Walle
This is a port of the kernel's spi-nxp-fspi driver. It uses the new spi-mem interface and does not expose the more generic spi-xfer interface. The source was taken from the v5.3-rc3 tag. The port was straightforward: - remove the interrupt handling and the completion by busy polling the controller - remove locks - move the setup of the memory windows into claim_bus() - move the setup of the speed into set_speed() - port the device tree bindings from the original fspi_probe() to ofdata_to_platdata() There were only some style change fixes, no change in any logic. For example, there are busy loops where the return code is not handled correctly, eg. only prints a warning with WARN_ON(). This port intentionally left most functions unchanged to ease future bugfixes. This was tested on a custom LS1028A board. Because the LS1028A doesn't have proper clock framework support, changing the clock speed was not tested. This also means that it is not possible to change the SPI speed on LS1028A for now (neither is it possible in the linux driver). Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-01-27Merge tag 'u-boot-clk-26Jan2020' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-clk - Various clock fixes and enhancements
2020-01-26clock_imx8mq: Make frac_pll_init() staticPedro Jardim
Since frac_pll_init() is only used in this file, change it to 'static'. This fixes the following sparse warning: arch/arm/mach-imx/imx8m/clock_imx8mq.c:662:5: warning: no previous prototype for ‘frac_pll_init’ [-Wmissing-prototypes] Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26clock_imx8mq: Remove the function sscg_pll_init()Pedro Jardim
Function sscg_pll_init() is not used anywhere, so it can simply be deleted. This was found because of the following sparse warning: arch/arm/mach-imx/imx8m/clock_imx8mq.c:702:5: warning: no previous prototype for ‘sscg_pll_init’ [-Wmissing-prototypes] int sscg_pll_init(u32 pll) ^~~~~~~~~~~~~ Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26clock_imx8mq: Make do_imx8m_showclocks() staticPedro Jardim
Since do_imx8m_showclocks() is only used inside this file, make it 'static'. This fixes the following sparse warning: arch/arm/mach-imx/imx8m/clock_imx8mq.c:836:5: warning: no previous prototype for ‘do_imx8m_showclocks’ [-Wmissing-prototypes] int do_imx8m_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, ^~~~~~~~~~~~~~~~~~~ Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26clock_imx8mq: Delete not used init_usb_clk()Pedro Jardim
Function init_usb_clk() is not used anywhere, so it can simply be deleted. This was detected by the following sparse warning: arch/arm/mach-imx/imx8m/clock_imx8mq.c:377:6: warning: no previous prototype for ‘init_usb_clk’ [-Wmissing-prototypes] void init_usb_clk(void) ^~~~~~~~~~~~ Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26clk: imx: pllv3: fix potential 'divide by zero' in av_set_rate()Giulio Benetti
Guard 'parent_rate==0' to prevent 'divide by zero' issue in clk_pplv3_av_set_rate(). If it is 0, let's return with -EINVAL. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-26clk: imx: pllv3: fix potential 'divide by zero' in av_get_rate()Giulio Benetti
Guard 'mfd==0' to prevent 'divide by zero' issue in clk_pplv3_av_get_rate(). If it is 0, let's return with EIO since mfd should never be 0 at all. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-26clk: imx: pllv3: fix potential 'divide by zero' in sys_get_rate()Giulio Benetti
Guard 'parent_rate==0' to prevent 'divide by zero' issue in clk_pplv3_sys_get_rate(). If it is 0, let's return with -EINVAL. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-26common: fix regression on block cache initAngelo Durgehello
m68k needs block cache list initialized after relocation. Other architectures must not be involved. Fixing regression related to: commit 1526bcce0f7285087621e16e6720636d01839da8 ("common: add blkcache init") Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-26arm: mvebu: fix A38x breakage from commit bb872dd930ccJoel Johnson
This function parameter usage of load_addr was incorrectly caught in the clarifying renames of commit bb872dd930cc, which results in boot failures on Marvell A38x. Signed-off-by: Joel Johnson <mrjoel@lixil.net> Patch-to: Simon Glass <sjg@chromium.org>
2020-01-26Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai) - Allwinner R40 Ethernet, usb phy enablement (Andre Przywara) - Sunxi auto load from 128KB MMC offset (Andre Przywara) - Orange Pi Win Ethernet phy enablement (Jernej Skrabec)
2020-01-26configs: Orange Pi Win: enable ethernet phyJernej Skrabec
Orange Pi Win has gigabit ethernet port, but default U-Boot configuration for that board enabled ethernet driver but didn't enable realtek phy. Fix that. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-26sunxi: Automate loading from 128KB MMC offsetAndre Przywara
Since commit 067e0b9684d4 ("sunxi: Allow booting from 128KB SD/eMMC offset") we support having the SPL loaded from either the traditional 8KB SD card/eMMC offset, or from the alternative location at 128KB. However the sector to find the U-Boot image was still hard-coded at compile time, and had to be adjusted for one of the two choices. Since we can actually override the function to return the sector offset, we can just check the boot source byte there to select the proper offset based on from where the SPL was loaded. This allows the very same binary image to be loaded from either 128KB or 8KB, with the U-Boot proper image always being located just behind the SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-26sunxi: SPL: Factor out sunxi_get_boot_source()Andre Przywara
The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into a certain location in SRAM, so the SPL can easily determine where to load U-Boot proper from. Factor out reading this value, as it will come in handy again shortly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-26clk: Fix error checking of dev_read_addr_ptrSean Anderson
dev_read_addr_ptr returns NULL on error, not FDT_ADDR_T_NONE. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-01-26clk: Include missing headers for linux/clk-provider.hSean Anderson
This header was missing a couple of include dependencies when included on its own. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-01-26clk: uclass: clk_get_by_name() must not be available if CONFIG_OF_PLATDATA ↵Giulio Benetti
is enabled clk_get_by_name() requires clk_get_by_id() that is not available if CONFIG_OF_PLATDATA is defined, so move clk_get_by_name() into #else condition of #if CONFIG_IS_ENABLED(OF_PLATDATA). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-26clk: show more error info when uclass_get_device_by_namePeng Fan
It will ease debug when uclass_get_device_by_name failed with more error info printed out. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-26clk: mediatek: use unsigned type for returning the clk rateFabien Parent
mtk_clk_find_parent_rate is calling clk_get_rate to know the rate of a parent clock. clk_get_rate returns a ulong, while mtk_clk_find_parent_rate returns an int. This implicit cast creates an issue for clock rates big enough to need the full 32 bits to store its data. When that happen the clk rate will become incorrect because of the implicit cast between ulong -> int -> ulong. This commit change the return type of mtk_clk_find_parent_rate to ulong. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2020-01-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
Updates and fixes for ls1028a, lx2160a, ls1012a, ls1021a, ls2080a, ls1088a platforms: - lx2-rev2 pcie support, enetc related updates, layerscape-pcie fixes
2020-01-25Merge branch '2020-01-24-master-imports'Tom Rini
- Enable fastboot on some MediaTek platforms - DMA enchancements - Assorted bugfixes
2020-01-25mtd: add prototypes for weak functionPatrick Delaunay
This patch adds a prototype for the weak function board_mtdparts_default(). It solves one warning when compiling with W=1 on stm32mp1 board: board/st/stm32mp1/stm32mp1.c: warning: no previous prototype for 'board_mtdparts_default' [-Wmissing-prototypes] void board_mtdparts_default(const char **mtdids, const char **mtdparts) ^~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-25common: blk: fix comment about blkcache_read return valueEric Nelson
The blkcache_read() routine returns 1 (true) to indicate that a block was found in the cache and returned, or 0 if not. Signed-off-by: Eric Nelson <eric@nelint.com>
2020-01-25meerkat96: fix typo in MAINTAINERS email addressShawn Guo
There is a typo in meerkat96 MAINTAINERS email address. Fix it. Reported-by: Carl Gelfand <carl@novtech.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2020-01-25genboardscfg.py: drop python version commentBaruch Siach
genboardscfg.py requires python 3.x since commit 3bc14098d8fb ("genboardscfg.py: Convert to Python 3"). Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-25common: add blkcache initAngelo Durgehello
On m68k, block_cache list is relocated, but next and prev list pointers are not adjusted to the relocated struct list_head address, so the first iteration over the block_cache list hangs. This patch initializes the block_cache list after relocation. Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com> Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-25net: macb: Drop local cache flushVignesh Raghavendra
Now that arch specific dma mapping APIs take care of cache flush/invalidate, drop local cache flush operation. While at that fix dma_unmap_single() call to match new prototype Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-01-25mtd: denali: Drop custom dma mapping functionsVignesh Raghavendra
Drop local dma_map_single() and dma_unmap_single() and use arch specific common implementation Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-25mmc: tmio-common: Drop custom dma mapping functionsVignesh Raghavendra
Drop local dma_map_single() and dma_unmap_single() and use arch specific common implementation Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-25asm: dma-mapping.h: Fix dma mapping functionsVignesh Raghavendra
Subsystems such as USB expect dma_map_single() and dma_unmap_single() to do dcache flush/invalidate operations as required. For example, see see drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request(). Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c, drivers/mtd/nand/raw/denali.c etc..) Update arch specific dma_map_single() and dma_unmap_single() APIs to do cache flush/invalidate operations, so that drivers need not implement them locally. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-01-25fastboot: mt85xx: add command to flash/erase emmc hwpartmingming lee
This patch includes the following: 1. Add fastboot command to erase the whole EMMC_USER 2. Add fastboot command to flash image at EMMC_BOOT1 3. Add fastboot command to erase the whole EMMC_BOOT1 4. Enale CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT for mt8518 Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-25configs: mt8518: Enable fastboot related configsmingming lee
Enable EFI module. Enable fastboot. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-25configs: mt8518: enable usb gadget drivermingming lee
Enable board_late_init and usb gadget for mt8518 Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-25configs: mt8518: set global variables for fastbootmingming lee
set common fastboot variables for mt8518 Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-25ARM: Mediatek: Add board_late_init to init usb gadget drivermingming lee
Add board_late_init function to init usb gadget driver for mt8518 Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-25usb: musb-new: mt85xx: add musb-new gadget driver.mingming lee
Using musb-new structure for mt85xx gadget driver. Add gadget driver dts for mt8518 SoCs. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-25crypto: make mod_exp_sw() staticHeinrich Schuchardt
Function mod_exp_sw() is only used via the operators of the uclass. It is not defined in any include. Make mod_exp_sw() static. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-01-25lib: Kconfig dependencies for pseudo-random libraryHeinrich Schuchardt
drivers/rng/sandbox_rng.c requires rand() to be defined but configuration option CONFIG_CONFIG_LIB_RAND selected in drivers/rng/Kconfig does not exist. test/lib/test_aes.c requires rand() to be defined. Fix the selection criteria for choice "Pseudo-random library support type". Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-01-25lib: rsa: consider CONFIG_SPL_RSAHeinrich Schuchardt
CONFIG_SPL_RSA is meant to control if lib/rsa/* is used for SPL. Adjust lib/Makefile to consider this setting. This was correctly setup with commit 51c14cd128f4 ("verified-boot: Minimal support for booting U-Boot proper from SPL") and got lost with commit 089df18bfe9d ("lib: move hash CONFIG options to Kconfig"). Fixes: 089df18bfe9d ("lib: move hash CONFIG options to Kconfig") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-01-24sunxi: Add Libre Computer ALL-H5-CC H5 boardChen-Yu Tsai
The Libre Computer ALL-H5-CC board is an upgraded version of the ALL-H3-CC. Changes include: - Gigabit Ethernet via external RTL8211E Ethernet PHY - 16 MiB SPI NOR flash memory - PoE tap header - Line out jack removed Only H5 variant test samples were made available, and the vendor is not certain whether other SoC variants would be made or not. Furthermore the board is a minor upgrade compared to the ALL-H3-CC. Thus the device tree simply includes the one for the ALL-H3-CC, and adds the changes on top. The device tree was synced over from the Linux kernel, along with other H3/H5 changes, in a previous patch. Thus only the defconfig and an entry to the MAINTAINERS file is added. Signed-off-by: Chen-Yu Tsai <wens@csie.org> [jagan: drop CONFIG_SYS_SPI_U_BOOT_OFFS] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-24sunxi: Add Libre Computer ALL-H3-IT H5 boardChen-Yu Tsai
The Libre Computer ALL-H3-IT board is a small single board computer that is roughly the same size as the Raspberry Pi Zero, or around 20% smaller than a credit card. The board features: - H2, H3, or H5 SoC from Allwinner - 2 DDR3 DRAM chips - Realtek RTL8821CU based WiFi module - 128 Mbit SPI-NOR flash - micro-SD card slot - micro HDMI video output - FPC connector for camera sensor module - generic Raspberri-Pi style 40 pin GPIO header - additional pin headers for extra USB host ports, ananlog audio and IR receiver Only H5 variant test samples were made available, but the vendor does have plans to include at least an H3 variant. Thus the device tree is split much like the ALL-H3-CC, with a common dtsi file for the board design, and separate dts files including the common board file and the SoC dtsi file. The other variants will be added as they are made available. The device tree was synced over from the Linux kernel, along with other H3/H5 changes, in a previous patch. Thus only the defconfig and an entry to the MAINTAINERS file is added. Signed-off-by: Chen-Yu Tsai <wens@csie.org> [jagan: drop CONFIG_SYS_SPI_U_BOOT_OFFS] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-24sunxi: move CONFIG_SYS_SPI_U_BOOT_OFFS out of defconfigAndre Przywara
For Allwinner SoCs the CONFIG_SYS_SPI_U_BOOT_OFFS value is not really a board choice: The boot ROM only loads the SPL from offset 0 of the SPI NOR flash, and loads at most 32KB. This is a similar situation as on MMC, so consequently we create our "joint" image (SPL + U-Boot proper) with that 32KB offset during the build. So define the value of this symbol to be 32KB by default for every Allwinner SoC. This removes the definition of this symbol from the _defconfig files, and avoids every board to define this over and over again. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-24sunxi: defconfig: R40 boards: enable USBAndre Przywara
Now that the USB PHY on the Allwinner R40 SoC is supported, enable USB support for the two R40 boards U-Boot supports. For this we need to add the GPIO pin that powers the USB port(s), also enable the usual suspects (OHCI/EHCI support). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
generated by cgit (git 2.34.1) at 2024-12-26 18:19:47 +0000