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2020-01-07configs: socfpga: Move Stratix10 and Agilex common CONFIGsLey Foon Tan
Move Stratix10 and Agilex common CONFIGs to socfpga_soc64_common.h. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: dts: agilex: Add base dtsi and devkit dtsLey Foon Tan
Add device tree files for Agilex SoC platform. socfpga_agilex-u-boot.dtsi and socfpga_agilex_socdk-u-boot.dts contains Uboot specific DT properties. socfpga_agilex.dtsi and socfpga_agilex_socdk.dts are from Linux (kernel/git/dinguyen/linux.git, commit 6f0bf971bacacc) Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add SPL for Agilex SoCLey Foon Tan
Add SPL support for Agilex SoC. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07board: intel: agilex: Add socdk board support for Intel Agilex SoCLey Foon Tan
Add socdk board support for Intel Agilex SoC Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07ddr: altera: agilex: Add SDRAM driver for AgilexLey Foon Tan
Add SDRAM driver for Agilex SoC. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07ddr: altera: Restructure Stratix 10 SDRAM driverLey Foon Tan
Restructure Stratix 10 SDRAM driver. Move common code to separate file, in preparation to support SDRAM driver for Agilex. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: agilex: Add clock handoff offset for AgilexLey Foon Tan
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07cache: Add Arteris Ncore cache coherent unit driverLey Foon Tan
Add Cache Coherency Unit (CCU) driver. CCU is to ensures consistency of shared data between multi masters in the system. Driver initializes CCU's directories and coherency agent interfaces in CCU IP. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add clock wrapper functionsLey Foon Tan
Add clock wrapper functions call to clock DM functions to get clock frequency and used in cm_print_clock_quick_summary(). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07clk: agilex: Add clock driver for AgilexLey Foon Tan
Add clock manager driver for Agilex. Provides clock initialization and get_rate functions. agilex-clock.h is from Linux commit ID cd2e1ad12247. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHzLey Foon Tan
CLKMGR_INTOSC_HZ should be 400MHz, instead of 460MHz. Removed also unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Move Stratix10 and Agilex clock manager common codeLey Foon Tan
Move Stratix10 and Agilex clock manager common code to new header file. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add system manager supportLey Foon Tan
Add system manager support for Agilex. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Move Stratix10 and Agilex system manager common codeLey Foon Tan
Move Stratix10 and Agilex system manager common code to system_manager_soc64.h. Changed macros to use SYSMGR_SOC64_*. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add reset manager supportLey Foon Tan
Add reset manager support for Agilex. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Move Stratix10 and Agilex reset manager common codeLey Foon Tan
Move Stratix10 and Agilex reset manager common code to reset_manager_soc64.h. Changed macros to RSTMGR_SOC64_*. Remove unused RSTMGR_XXX defines. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Move firewall code to firewall fileLey Foon Tan
Move firewall related code to new firewall.c, to share code in Stratix 10 and Agilex. SDMMC will transfer data to OCRAM in SPL. So, enable privilege for SDMMC to allow DMA transfer to OCRAM. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: agilex: Add base address for Intel Agilex SoCLey Foon Tan
Add base address for Intel Agilex SoC. Reuse base_addr_s10.h for Agilex, only one base address is different from S10. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Convert clock manager from struct to definesLey Foon Tan
Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get clock manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Convert system manager from struct to definesLey Foon Tan
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get system manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: socfpga: Convert reset manager from struct to definesLey Foon Tan
Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get reset manager base address from DT node instead of using #define. spl_early_init() initializes the DT setup. So, move spl_early_init() to beginning of function and before get base address from DT. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07arm: dts: socfpga: Add u-boot, dm-pre-reloc for sysmgr and clkmgr nodesLey Foon Tan
Add u-boot,dm-pre-reloc for sysmgr and clkmgr nodes to use it in SPL. In preparation to get base address from DT. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07spl: Allow cache drivers to be used in SPLLey Foon Tan
Add an option for building cache drivers in SPL. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-06Merge branch 'next'Tom Rini
Bring in the following merges: commit 8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 Merge: 87f69f467a83 63618e71e89b Author: Tom Rini <trini@konsulko.com> Date: Fri Jan 3 09:48:47 2020 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support commit 87f69f467a8335b171c71bf217d2625d515acd7c Merge: c0912f9bbfb2 4466b9970319 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 24 08:18:19 2019 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next - Enable DM driver on ppc/km boards - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x, T104x, P4080, P2041, P2020, P1020, P3041 - Some updates in mpc85xx-ddr driver, km boards commit c0912f9bbfb26dd03d189953678691b799d35b6e Merge: 533c9f5714bd a1d6dc3f8407 Author: Tom Rini <trini@konsulko.com> Date: Wed Dec 18 07:20:19 2019 -0500 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next - Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral commit 533c9f5714bdba79dc6f2629284d4c1a08a611d1 Merge: 553cb0688782 033e18b47bd0 Author: Tom Rini <trini@konsulko.com> Date: Tue Dec 17 07:53:08 2019 -0500 Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next i2c: for next - misc: i2c_eeprom: Add partition support and add ability to query size of eeprom device and partitions - i2c common: add support for offset overflow in to address and add sandbox tests for it. commit 553cb06887825314e74a9bdac337467c77d1db88 Merge: f39abbbc531e b4f98b3b16ec Author: Tom Rini <trini@konsulko.com> Date: Thu Dec 12 08:18:59 2019 -0500 Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next buildman improvements including toolchain environment feature sandbox unicode support in serial
2020-01-06Prepare v2020.01Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-04Revert "mmc: davinci: drop struct davinci_mmc_plat"Tom Rini
Adam Ford reports that this change breaks booting on da850-evm and Bartosz Golaszewski agrees that with the impending release we should revert the change for now. With that noted: This reverts commit 21a4d80a710c79053ac1deaa65ff9b69e6c031d4. Cc: Bartosz Golaszewski <brgl@bgdev.pl> Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-03Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into nextTom Rini
- updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support
2020-01-03Merge branch '2020-01-03-master-imports'Tom Rini
- Fixes for host tools with musl C library - Two fixes for TI K3 platforms
2020-01-03arm: mach-k3: Enable WA for R5F deadlockLokesh Vutla
On K3 devices there are 2 conditions where R5F can deadlock: 1.When software is performing series of store operations to cacheable write back/write allocate memory region and later on software execute barrier operation (DSB or DMB). R5F may hang at the barrier instruction. 2.When software is performing a mix of load and store operations within a tight loop and store operations are all writing to cacheable write back/write allocates memory regions, R5F may hang at one of the load instruction. To avoid the above two conditions disable linefill optimization inside Cortex R5F which will make R5F to only issue up to 2 cache line fills at any point of time. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-03arm: dts: k3-j721e: ddr: Update to 0.2 version of DDR config toolLokesh Vutla
Update the ddr settings to use the DDR reg config tool rev 0.2.0. This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order to avoid DSS underflow errors. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2020-01-03include/u-boot/crc.h: pull 'uint' definition on musl targetsSergei Trofimovich
The build failure was originally reported on arm64-musl target at https://bugs.gentoo.org/703132. Here is the amd64-musl variant: ``` $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig -j$(nproc) $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all -j$(nproc) ... include/u-boot/crc.h:37:44: error: unknown type name 'uint'; did you mean 'int'? 37 | void crc16_ccitt_wd_buf(const uint8_t *in, uint len, | ^~~~ | int ``` Note: 'uint' is not defined there. On glibc 'uint' comes from <sys/types.h> and happens to work on most .c files. The change imports 'uint' declaration from '<compiler.h>'. Bug: https://bugs.gentoo.org/703132 Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
2020-01-03include: fix 'ulong' definition on musl targetsSergei Trofimovich
The build failure was originally reported on arm64-musl target at https://bugs.gentoo.org/703132. Here is the amd64-musl variant: ``` $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig -j$(nproc) $ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all -j$(nproc) ... In file included from tools/env/../../env/flags.c:7, from tools/env/env_flags.c:1: include/env.h:159:1: error: unknown type name 'ulong'; did you mean 'long'? 159 | ulong env_get_ulong(const char *name, int base, ulong default_val); | ^~~~~ | long ``` Note: 'ulong' is not defined there. On glibc 'ulong' comes from <sys/types.h>: ```c /* Old compatibility names for C types. */ typedef unsigned long int ulong; ``` On musl it comes from <sys/types.h> as well but from under different guards: ```c typedef unsigned long u_long, ulong; ``` The change inlines 'ulong' define similar to 'uint' define. Bug: https://bugs.gentoo.org/703132 Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
2020-01-02Merge tag 'fixes-v2020.01' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix missing graphics output on some x86 boards - avoid using #ifdef in video code - add .gitignore for video font *.S files
2020-01-02video: add wrappers for ttf type files to .gitignoreDario Binacchi
The scripts/Makefile.lib generates an assembler file (*.S) to wrap the font data for each file of type ttf defined in Kconfig. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-01-02Merge tag 'u-boot-rockchip-20191231' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix latest mainline kernel for rk3308 - Update rk3288-evb config to suport OP-TEE - Fix for firefly-px30 DEBUG_UART channel and make it standalone - Script make_fit_atf add python3 support - Fix rk3328 timer with correct COUNTER_FREQUENCY - Fix rk3328 ATF support with enable spl-fifo-mode
2020-01-02Merge branch '2020-01-02-master-imports'Tom Rini
- Assorted test.py fixes - Other minor changes
2020-01-02test: Fix the boardspec for the SPL handoff testSimon Glass
This test currently does not run because it specifies the sandbox board instead of sandbox_spl. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02mailmap: Update mail address for Igor OpaniukIgor Opaniuk
My address at Linaro doesn't exist anymore, so people keep getting mail delivery error responses. Map this address to the actual one. Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-02test_env: don't strip() printenv resultsStephen Warren
get_env() was originally written to strip() the output of printenv to isolate the test from any whitespace changes in printenv's output. However, this throws away any whitespace in the variable value, which can cause issues when test code expects to see that whitespace. In fact, printenv never adds any whitespace at all, so there's no need to strip. The strip causes a practical problem for test_env_echo_exists() if state_test_env.get_existent_var() happens to choose a U-Boot variable that contains trailing whitespace. This is true for variable boot_targets. With Python 2, get_existent_var() never returned boot_targets so this issue never caused a practical problem. With Python 3, get_existent_var does sometimes return boot_targets, no doubt due to Python 3's different dict hash key order implementation, about 0.5-2% of the time, so this test appears intermittent. With the strip removed, this intermittency is solved, since the test passes for all possible U-Boot variables. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2020-01-02arch/arm/Kconfig: typo/grammar/punctuation fixesRobert P. J. Day
Various (mostly minor) spelling, grammar and punctuation tweaks for arch/arm/Kconfig. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2020-01-02.gitignore: ignore files generated by asn1 compilerDario Binacchi
As described in doc/README.asn1 document the tools/asn1_compiler is used to "generate bytecode as a C file (*.asn1.[ch]) from *.asn1 file". Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-01-02tools: .gitignore: add asn1_compilerDario Binacchi
Add the tool to the ignore list to prevent being marked as unversioned. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-01-02video: Avoid using #ifdef in video-uclass.cSimon Glass
This code does not really need to use #ifdef. We can use if() instead and gain build coverage without impacting code size. Change the #ifdefs to use IS_ENABLED(), etc., instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02video: Avoid using #ifdef in vidconsole-uclass.cSimon Glass
This code does not really need to use #ifdef. We can use if() instead and gain build coverage without impacting code size. Change the #ifdefs to use CONFIG_IS_ENABLED() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02video: Avoid using #ifdef in console_rotate.cSimon Glass
This code does not really need to use #ifdef. We can use if() instead and gain build coverage without impacting code size. Change the #ifdefs to use IS_ENABLED() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02video: Avoid using #ifdef in video blitting codeSimon Glass
This code does not really need to use #ifdef. We can use if() instead and gain build coverage without impacting code size. Change the #ifdefs to use IS_ENABLED() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02video: x86: Enable 32-bit graphics by defaultSimon Glass
Most x86 boards that use video make use of 32bpp graphics. Enable this by default. This fixes missing graphics output on some x86 boards. Also remove the unnecessary 'default n' while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-02pci: layerscape: Manage PCIe EP compatible string via KconfigPankaj Bansal
The ep node device tree name is governed by these bindings: https://github.com/torvalds/linux/blob/master/Documentation/ devicetree/bindings/pci/layerscape-pci.txt#L24 As per above the ep compatible node contains platform name. Therefore, define the ep node compatible as CONFIG to find the pcie ep node in device tree during device tree fixup. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-02pci: layerscape: move PCIE related CONFIG to PCI KconfigPankaj Bansal
move the PCIE related config from arch Kconfig to PCI Kconfig. As the PCI_LAYERSCAPE driver is being used in platform other than fsl-layerscape platforms like ls102xa. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-31rockchip: evb-rk3328: Enable support ATF in SPLKever Yang
Enable the ATF in SPL and adjust the SPL STACK/HEAD at the same time to support ATF entry at 0x40000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit (git 2.34.1) at 2024-12-26 09:23:02 +0000