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2020-09-30optee: copy FDT OP-TEE related nodes before generic FDT changesEtienne Carriere
Move call to optee_copy_fdt_nodes() introduced by commit 6ccb05eae01b before generic changes in kernel FDT so that platform specific changes are not overridden by the changes made by this function. Fixes: 6ccb05eae01b ("image: fdt: copy possible optee nodes to a loaded devicetree") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-29Merge branch '2020-09-29-assorted-fixes'Tom Rini
- Assorted typo fixes - Correctly migrate some CONFIG_PREBOOT cases to defconfig - Coverity issues in squashfs
2020-09-29video: typo NormllyHeinrich Schuchardt
%s/Normlly/Normally/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-29README: Fix typo in Board Initialisation FlowNaoki Hayama
I suppose 'these' might be 'there'. Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
2020-09-29fs/squashfs: parameter check sqfs_read_metablock()Heinrich Schuchardt
We should check if the incoming parameter file_mapping is not NULL instead of checking after adding an offset. Reported-by: Coverity CID 307210 Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2020-09-29mtd: fix typos in drivers/mtd/Kconfig, drivers/mtd/renesas_rpc_hf.cHeinrich Schuchardt
Fix a typo %s/interract/interact/ Use Samsung's capitalization of their trademarks %s/onenand/OneNAND/ %s/Hyperflash/HyperFlash/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de> [trini: Add other Hyperflash cases as noted by Stefan] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-29Define default CONFIG_PREBOOT with right config optionPeter Robinson
The 44758771ee commit removes CONFIG_PREBOOT but actually sets the USE_PREBOOT Kconfig option which isn't CONFIG_PREBOOT and is also a bool option which means we regress because 'usb start' isn't run when expected, it should also be run for devices that have USB storage because keyboards aren't the only thing we might need the USB bus for. Fixes: 44758771ee ("arm: move CONFIG_PREBOOT="usb start" to KConfig") Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Cc: Jonas Smedegaard <dr@jones.dk> Cc: Neil Armstrong <narmstrong@baylibre.com>
2020-09-28Merge tag 'efi-2020-10-rc6' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-10-rc6 The following UEFI related issues are fixed: * restore the global data pointer in the RISC-V trap handler * install EFI_RNG_PROTOCOL only if we have a random number generator * display human readable string for EFI_RNG_PROTOCOL in efidebug command
2020-09-28Merge tag 'u-boot-amlogic-20200928' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - fix RNG driver probe & linux EFI KASLR boot on GXL, GXM, G12A, G12B & SM1 based boards
2020-09-28riscv: restore global data pointer in trap handlerHeinrich Schuchardt
The gp register is used to store U-Boot's global data pointer. We should not assume that an UEFI application leaves the gp register unchanged as the UEFI specifications does not define who is the owner of the gp and tp registers. So the following sequence should be followed in the trap handler: * save the caller's gp register * restore the global data pointer * serve interrupts or print crash dump and reset * restore the caller's gp register Cc: Abner Chang <abner.chang@hpe.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-28rng: meson: make core clock optionalNeil Armstrong
This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1 based boards dues to the lack of the core clock in the device tree. It was reported breaking EFI boot in the Linux EFI stub, because the EFI_RNG_PROTOCOL didn't check for the RNG device presence before installing itself. The Linux amlogic,meson-rng.yaml doesn't mandate the core clock, this the clock should be ignores if not present. Nevertheless, the clock should be present and this should be fixed on the Linux meson-gxl.dtsi & meson-g12-common.dtsi then synced with U-Boot. The change has been tested on a Khadas VIM3, which uses the common meson-g12-common.dtsi like the Odroid-C4 & Odroid-N2 in Scott's report, along with the RNG cmd. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Reported-by: Scott K Logan <logans@cottsay.net> Fixes: bc40eb278b ("drivers/rng: add Amlogic hardware RNG driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Scott K Logan <logans@cottsay.net> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-27efi_loader: installation of EFI_RNG_PROTOCOLHeinrich Schuchardt
Having an EFI_RNG_PROTOCOL without a backing RNG device leads to failure to boot Linux 5.8. Only install the EFI_RNG_PROTOCOL if we have a RNG device. Reported-by: Scott K Logan <logans@cottsay.net> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-27efi_loader: efidebug display RNG protocolHeinrich Schuchardt
Add the Random Number Generator (RNG) protocol to the GUIDs that the 'efidebug dh' protocol can replace by a text. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- Bug fixes related to PCIe, pfe, xfi, gpio, reset, vid, env, and usb on layerscape products
2020-09-24pci: layerscape: Fixup PCIe EP mode DT nodes for LX2160A rev2Hou Zhiqiang
LX2160A rev2 uses different PCIe controller, so EP mode DT nodes also need to be fixed up. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: pfe_eth: Remove non-DM code check from pfe_spi_flash_initKuldeep Singh
CONFIG_DM_SPI_FLASH is only supported now with passing of driver conversion deadline from non-DM to DM model. Hence, it's safe to remove non-DM code check from pfe_spi_flash_init. Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of reading reading values from DT. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: pfe_eth: Fix resoure leak in pfe_spi_flash_initKuldeep Singh
Fix Coverity issue: RESOURCE_LEAK. leaked_storage: Variable addr going out of scope leaks the storage it points to. Fixes: e0152dbed683 ("net: pfe_eth: Use spi_flash_read API to access flash memory") Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24arm: dts: lx2160a: Add IO rangeWasim Khan
Add IO range property to fix below error on uboot PCI: Failed autoconfig bar 18 Signed-off-by: Wasim Khan <wasim.khan@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24driver: net: fm: add support for XFIMadalin Bucur
All the 10G ports that were working in XFI mode were described as using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time). Add the minimal changes required for the FMan code to support XFI. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24ls1012a, pfe_eth: Update probe to avoid resource leakChaitanya Sakinam
PFE DDR addresses are now stored on to a stack varaiable rather dynamic allocation. Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24ls1012a, pfe_eth: correction in delay implementationChaitanya Sakinam
correction in delay implementation before we exit out of tx timeout. Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24drivers: net: phy: Use Aquantia driver for AQR113CMadalin Bucur
Add support for AQR113C PHY Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabledGrigore Popescu
The next DPMAC was always verified if it is enabled. In case of DPMAC@6, the DPMAC@7 is verified. As DPMAC@7 is disabled, DPMAC@6 will be considered disabled and not detected by uboot. Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24armv8: dts: fsl-lx2160a: add gpio0 gpio1 gpio3 DT nodeshui.song
add gpio0 gpio1 gpio3 DT nodes to fsl-lx21600.dtsi Signed-off-by: hui.song <hui.song_1@nxp.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24armv8: lx2160a: fix reset sequenceMeenakshi Aggarwal
Make sure that SW_RST_REQ and RST_REQ_MSK are cleared before triggering hardware reset request. Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24lx2160: Correct sd_boot environment variableMeenakshi Aggarwal
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24board: freescale: emc2305: Pass chip_addr to set_fan_speedWasim Khan
emc2305 is a common driver. It should not use platform specific i2c address for slave device. Pass chip_addr as agrument to emc2305_init() and set_fan_speed() so that emc2305 driver can be used with different platforms. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24board/freescale/lsch3: Correct entry for 0.9vMartin Kaistra
According to the reference manual of LS2088A, for a VDD voltage of 0.9V, the entry should be at 01000b. Fixes: 4911948ec73 ("board/freescale,lsch3: Add entry for 0.9v") Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24arm64: Layerscape: Survive LPI one-way reset workaroundHou Zhiqiang
The workaround of LPI one-way reset issue is broken by the series: https://patchwork.ozlabs.org/project/uboot/list/?series=192398 This patch is to add DT node for GIC RD tables and create corresponding reserved-memory node in kernel DT to fix it. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24fsl-layerscape: enable dwc3 snooping featureRan Wang
Configure DWC3’s cache type to ‘cacheable’ for better performance. Actually related register definition and values are SoC specific, which means this setting is only applicable to Layerscape SoC, not generic for all platforms which have integrated DWC3 IP. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Enable NET_RANDOM_ETHADDR on Espressobin (Acked-by Kosta) - Espressobin & Clearfog: fdtfile enhancements - A37xx PCI: Disable link training when unloading driver - A37xx: increase CONFIG_SYS_BOOTM_LEN to 64MB - Add Macronix mx25u12835f support, used on uDPU and ESPRESSObin v7 - dns325: Correct CONFIG_NR_DRAM_BANKS parameter
2020-09-24arm64: a37xx: pci: Disable link training when unloading driverPali Rohár
As required by PCI Express spec a delay for at least 100ms after de-asserting PERST# signal is needed before link training is enabled. Linux kernels prior to 5.8 version do not automatically disable link training before de-asserting PERST# signal, therefore this requirement is not fulfilled. Above requirement is needed for proper detection of some Compex PCIe WiFi cards. Otherwise Linux kernel cannot detect it. To allow using those PCIe cards with older Linux kernel versions booted by U-Boot compiled with U-Boot a37xx pci driver, disable link training in U-Boot when unloading this pci driver. Thanks to DM_FLAG_OS_PREPARE flag, U-Boot automatically unload this driver when booting Linux kernel. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-24arm: kirkwood: dns325: Correct CONFIG_NR_DRAM_BANKS parameterTom Rini
Testing on a DNS-325 NAS has shown that in order for the device to work we need to set CONFIG_NR_DRAM_BANKS to 1 and not 2. Tested-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com> Reported-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com> Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-24arm: mvebu: Espressobin: Set environment variable fdtfileAndre Heider
Required for the generic distro mechanism. Linux ships with 4 variants: marvell/armada-3720-espressobin-v7-emmc.dtb marvell/armada-3720-espressobin-v7.dtb marvell/armada-3720-espressobin-emmc.dtb marvell/armada-3720-espressobin.dtb Use available information to determine the appropriate filename. Fixes booting GRUB EFI arm64 on Fedora. Reported-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24arm: mvebu: clearfog: don't override set fdtfile envBaruch Siach
Only set the fdtfile environment variable when not already set. Fixes: 867572f09ebe6 ("ARM: mvebu: clearfog: run-time selection of DT file") Cc: Joel Johnson <mrjoel@lixil.net> Reported-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-09-24arm: mvebu: defconfig: espressobin: enable NET_RANDOM_ETHADDRAndre Heider
The hardware does not provide a MAC address. Enable this so that network access works with just the default environment. Signed-off-by: Andre Heider <a.heider@gmail.com> Acked-by: Konstantin Porotchkin <kostap@marvell.com>
2020-09-24arm64: a37xx: increase CONFIG_SYS_BOOTM_LEN to 64MBVladimir Vid
Increase max gunzip size, required for booting itb recovery images on uDPU. Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr> [a.heider: adapt to mainline] Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24mtd: spi-nor-ids: add support for Macronix mx25u12835f flashVladimir Vid
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU and ESPRESSObin v7. Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr> [a.heider: adapt commit message to mainline] Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-23pci: layerscape: Fix spurious writes and panicMichael Walle
The fdt_fixup_pcie_ls() scans all PCI devices and assumes that all PCI root devices are layerscape PCIe controllers. Unfortunately, this is not true for the LS1028A. There is one additional static PCI root complex (this contains the networking devices) which has nothing to do with the layerscape PCIe controllers. On recent U-Boot versions this results in the following panic: "Synchronous Abort" handler, esr 0x96000044 elr: 000000009602fa04 lr : 000000009602f9f4 (reloc) elr: 00000000fbd73a04 lr : 00000000fbd739f4 x0 : 0080000002000101 x1 : 0000000000000000 x2 : 00000000fbde9000 x3 : 0000000000000001 x4 : 0000000000000000 x5 : 0000000000000030 x6 : 00000000fbdbd460 x7 : 00000000fbb3d3a0 x8 : 0000000000000002 x9 : 000000000000000c x10: 00000000ffffffe8 x11: 0000000000000006 x12: 000000000001869f x13: 0000000000000a2c x14: 00000000fbb3d2cc x15: 00000000ffffffff x16: 0000000000010000 x17: 0000000000000000 x18: 00000000fbb3fda0 x19: 0000000000000800 x20: 0000000000000000 x21: 00000001f0000000 x22: 0000000000000800 x23: 0000000000000009 x24: 00000000fbdc3c1b x25: 00000000fbdc28e5 x26: 00000000fbdcc008 x27: 00000000fbdc16e2 x28: 000000000f000000 x29: 00000000fbb3d3a0 Code: 394072a1 f94006a0 34000041 5ac00a94 (b8336814) Resetting CPU ... This bug already existed in former versions, but the spurious write was never trapped, because the destination address was a valid address (by pure luck). Make sure the PCI root is actually one of the expected PCIe layerscape controllers by matching its compatible string. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Heiko Thiery <heiko.thiery@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23configs: ls1012a/ls1046a: Add CONFIG_ENV_OVERWRITE in defconfigKuldeep Singh
CONFIG_ENV_OVERWRITE disables write protection on various environment variables like "ethaddr" and "serial". Enable this config in LS1046A and LS1012A defconfigs. This resolves an error while setting multiple values of "ethaddr" variable. Before the change: => setenv ethaddr 00:E0:0C:00:06:0 => setenv ethaddr 00:E0:0C:00:06:1 Error: Can't overwrite "ethaddr" Error inserting "ethaddr" variable, errno=1 After the change: => setenv ethaddr 00:E0:0C:00:06:0 => setenv ethaddr 00:E0:0C:00:06:1 Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-23ls1028a: use default scan_dev_for_bootMian Yousaf Kaukab
scan_dev_for_efi is supposed to be called from scan_dev_for_boot. However this call is missing for ls1028ardb and ls1028aqds boards. As a result EFI boot doesn’t work. Fix this issue by removing custom definition of scan_dev_for_boot and use the default definition instead. Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: andy.tang@nxp.com Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-22Merge tag 'mips-fixes-for-2020.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mips - mips: vocore2: fix SPL image generation - mips: vocore2: fix LZMA decompression errors - mips: vocore2: fix console output - mips: pic32mzda: fix DTC warnings and GPIO nodes - mips: pic32mzda: make GPIO and MMC working again
2020-09-23mips: vocore2: fix various issuesMauro Condarelli
- fix SPL image generation - fix incorrect console output - increase malloc_f and malloc_r space to fix LZMA decompression errors - increase SPI flash clock Signed-off-by: Mauro Condarelli <mc5686@mclink.it> [squashed to one patch, fix commit subject and description] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-09-23mips: dts: Fix PIC32MZDA GPIO register definitionsJohn Robertson
The GPIO bank name for banks J and K are not correct when using the 'gpio' command from the console. The driver derives the bank name from the device tree instance string by using the instance value and adding 'A': gpio0@xxaddrxx is Bank A, gpio1@yyaddryy is Bank B and so on. On the PIC32, there is no Bank I so instances 8 and 9 need to be incremented as a minimum change. An alternative (less opaque) implementation would be to use a bank-name property instead but this would require modifying the driver code too. Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23mips: dts: Fix PIC32MZDA GPIO register definitionsJohn Robertson
GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or using the 'gpio' command from the console. The root cause is a discrepancy between the driver and the device tree: the driver code expects an absolute I/O address in the <reg> property, while the device tree defines the address relative to a declaration in the parent pinctrl node. Changing the device tree to fix a driver issue would normally be wrong, however: - I have run the first version of U-Boot in which this driver appears (v2016.03) and the same problem exists, so this is not a regression; - There is no code that references a parent device tree node that might suggest the intent of the author was to parse the DT as it exists now; - The equivalent Linux PIC32 GPIO driver also uses absolute addresses for the GPIO <reg> property. This change brings the U-Boot DT more into line with Linux. Additionally, the data sheet (Microchip ref. 60001361H) shows that the register set to control a GPIO bank spans 0xE0 bytes, but the device tree specified size is only 0x48 bytes. Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23mips: dts: Fix device tree warnings for PIC32MZDAJohn Robertson
Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23mips: pic32mzdask: enable CONFIG_BLKJohn Robertson
CONFIG_BLK needs to be enabled by default to allow U-Boot to compile after a 'make pic32mzdask_defconfig'. Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23mips: pic32mzdask: disable SDHCI SDCD signal workaroundJohn Robertson
The PIC32MZ DA Starter Kit does not need the card detect workaround because the SDCD signal line is connected properly. Disable the workaround in this case. Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23pinmux: pic32: add SDHCI pin configJohn Robertson
The GPIO pins used by the SDHCI controller need to be configured to allow the interface to work. Signed-off-by: John Robertson <john.robertson@simiatec.com>
2020-09-23mmc: pic32: Refresh PIC32 MMC driverJohn Robertson
The existing driver is not compatible with the Driver Model. This patch makes the necessary changes while also removing obsolescent calls/properties as follows: - fdtdec_* calls replaced with dev_read_* equivalents; - 'clock-freq-min-max' property replaced by querying the frequency of the source clock 'base_clk'; - The card detect erratum workaround is applied during probe rather than overriding get_cd. The card detect workaround (Microchip ref. DS80000736E, erratum #15) is not always needed and can be disabled using a vendor specific DT property. Signed-off-by: John Robertson <john.robertson@simiatec.com>
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