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2019-07-21clk: rockchip: rk3399: Set 400MHz ddr clockJagan Teki
2019-07-21clk: rockchip: rk3399: Set 50MHz ddr clockJagan Teki
2019-07-21rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for pmuJagan Teki
2019-07-21rockchip: rk3399: syscon: Add pmu supportJagan Teki
2019-07-21arm: include: rockchip: Add rk3399 pmu fileJagan Teki
2019-07-21ram: rk3399: Add LPPDR4 mr detectionJagan Teki
2019-07-21ram: rk3399: Handle data training via opsJagan Teki
2019-07-21ram: rk3399: Simplify data training first argumentJagan Teki
2019-07-20ram: rk3399: Update lpddr4 vref_mode_acJagan Teki
2019-07-20ram: rk3399: Update lpddr4 mode_sel based on io settingsJagan Teki
2019-07-20ram: rk3399: Update lpddr4 vref based on io settingsJagan Teki
2019-07-20ram: rk3399: Get lpddr4 tsel_rd_en from io settingsJagan Teki
2019-07-20ram: rk3399: Configure soc odt supportJagan Teki
2019-07-20ram: rk3399: Add tsel control clock driveJagan Teki
2019-07-20ram: sdram: Configure lpddr4 tsel rd, wr based on IO settingsJagan Teki
2019-07-20ram: rk3399: Add IO settingsJagan Teki
2019-07-20ram: rk3399: Don't disable dfi dram clk for lpddr4, rank 1Jagan Teki
2019-07-20ram: rk3399: Configure tsel write ca for lpddr4Jagan Teki
2019-07-20ram: rk3399: Map chipselect for lpddr4Jagan Teki
2019-07-20ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4Jagan Teki
2019-07-20ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4Jagan Teki
2019-07-20ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4Jagan Teki
2019-07-20ram: rk3399: Configure PHY_898, PHY_919 for lpddr4Jagan Teki
2019-07-20ram: rk3399: Avoid two channel ZQ Cal Start at the same timeJagan Teki
2019-07-20ram: rk3399: Don't wait for PLL lock in lpddr4Jagan Teki
2019-07-20ram: rk3399: Move mode_sel assignmentJagan Teki
2019-07-20ram: rk3399: Add lpddr4 rank mask for wdql trainingJagan Teki
2019-07-20ram: rk3399: Add lpddr4 rank mask for ca trainingJagan Teki
2019-07-20ram: rockchip: Kconfig: Add RK3399 LPDDR4 entryJagan Teki
2019-07-20ram: rk3399: Configure phy IO in ds odtJagan Teki
2019-07-20ram: rk3399: Add DdrModeJagan Teki
2019-07-20ram: rk3399: Add ddrtimingC0Jagan Teki
2019-07-20ram: rk3399: Add ddr version enc macroJagan Teki
2019-07-20ram: rk3399: Introduce sys_reg3 for more capacity infoJagan Teki
2019-07-20ram: rk3399: Rename sys_reg with sys_reg2Jagan Teki
2019-07-20ram: rk3399: Simply existing dram enc macroJagan Teki
2019-07-20ram: rk3399: Enable sdram debug functionsJagan Teki
2019-07-20ram: rk3399: Add rank detection supportJagan Teki
2019-07-19Merge https://gitlab.denx.de/u-boot/custodians/u-boot-nds32Tom Rini
2019-07-19Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini
2019-07-19MAINTAINERS: Remove Macpaul and add Rick as nds32 maintainerRick Chen
2019-07-19doc: sifive-fu540: Update README for SiFive SPI and MMC SPI driversAnup Patel
2019-07-19riscv: sifive: fu540: Enable SiFive SPI and MMC SPI driversBhargav Shah
2019-07-19doc: sifive-fu540: Update README for steps to create FW_PAYLOADAnup Patel
2019-07-19riscv: sifive: fu540: Setup ethaddr env variable using OTPAnup Patel
2019-07-19clk: sifive: Drop GEMGXL clock driverAnup Patel
2019-07-19clk: sifive: Sync-up main driver with upstream LinuxAnup Patel
2019-07-19clk: sifive: Sync-up DT bindings header with upstream LinuxAnup Patel
2019-07-19clk: sifive: Sync-up WRPLL library with upstream LinuxAnup Patel
2019-07-19clk: sifive: Factor-out PLL library as separate moduleAnup Patel
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