summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2013-12-03exynos: spl: Add a custom spi copy functionRajeshwari Shinde
This patch implements a custom spi_copy funtion to copy u-boot from SF to RAM. This is faster then iROM spi_copy funtion as this runs spi at 50Mhz and also in WORD mode of operation. Changed a printf in pinmux.c to debug just to avoid the compilation error in SPL. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-03arm: rmobile: Remove config.mkNobuhiro Iwamatsu
Renesas ARM SoCs (R-Mobile, R-Car) are armv7 only. This drops armv5 supprt from PLATFORM_CPPFLAGS and remove config.mk of rmobile. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2013-12-03arm: kzm9g: Fix undefined reference to `__aeabi_uldivmod' errorNobuhiro Iwamatsu
The kzm9g board fails in building with -march=armv7-a. This fixs this problem by converting to do_div(). ----- USE_PRIVATE_LIBGCC=yes ./MAKEALL kzm9g ... arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_us': arch/arm/cpu/armv7/rmobile/timer.c:41: undefined reference to `__aeabi_uldivmod' arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_ms': arch/arm/cpu/armv7/rmobile/timer.c:47: undefined reference to `__aeabi_uldivmod' ----- Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2013-12-03arm: rmobile: Add support koelsch boardNobuhiro Iwamatsu
The koelsch board has R8A7791, 2GB DDR3-SDRAM, USB, Quad SPI, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
2013-12-03arm: rmobile: Add support R8A7791Nobuhiro Iwamatsu
Renesas R8A7791 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
2013-12-03arm: rmobile: Add support lager boardNobuhiro Iwamatsu
The lager board has R8A7790, 4GB DDR3-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - DDR3-SDRAM - SCIF Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
2013-12-03arm: rmobile: Add support R8A7790Nobuhiro Iwamatsu
Renesas R8A7790 is CPU with Cortex-A7 and A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Albert Aribaud <albert.u.boot@aribaud.net>
2013-12-03arm: rmobile: Move lowlevel_init.o to taget of each CPUNobuhiro Iwamatsu
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2013-12-03arm: exynos: fix the align for exynos4_power structureMinkyu Kang
res3 should be 4bytes Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Dominik Klein <dominik.klein@gmx.com>
2013-12-03arm: exynos: fix set_mmc_clk for exynos4x12Jaehoon Chung
Fix the set_mmc_clk() for exnos4x12. If board is exynos4x12, mmc clock should be set to wrong value. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-03trats: usb: Add usb_cable_connected() functionPrzemyslaw Marczak
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-02Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD
2013-12-02Merge branch 'serial' of git://git.denx.de/u-boot-microblazeTom Rini
2013-12-02Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini
2013-12-02Blackfin: remove executable permission of AWK scriptMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-12-02Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2013-12-02serial: zynq: Remove unused #definesSoren Brinkmann
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: trini, uboot
2013-12-02trats2: enable dfu and thor protocol for Tizen downloadPiotr Wilczek
Trats2 config is updated to support DFU mode. Malloc pool must be increased for DFU buffer allocation. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-02trats2: enable ums support on Trats2Piotr Wilczek
This patch adds support for USB and enables 'ums' command on Trats2 board. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-02driver:usb:s3c_udc: add support for Exynos4x12Piotr Wilczek
This patch add new defines for usb phy for Exynos4x12. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-12-01arm: atmel: eb_cpux9k2: config clean upJens Scharsig (BuS Elektronik)
* remove mature defines from board config Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: sam9m10g45ek: let CONFIG_SYS_NO_FLASH at proper positionBo Shen
In config_cmd_default.h, it will use CONFIG_SYS_NO_FLASH to decide whether include CONFIG_CMD_FLASH and CONFIG_CMD_IMLS. So, if the CONFIG_SYS_NO_FLASH defined later than include/config_cmd_default.h, These two commands will be included always. So move CONFIG_SYS_NO_FLASH definition to proper position. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm926ejs, at91: add common phy_reset functionHeiko Schocher
add common phy reset code into a common function. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Jens Scharsig <esw@bus-elektronik.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Stelian Pop <stelian@popies.net> Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> Cc: Eric Benard <eric@eukrea.com> Cc: Markus Hubig <mhubig@imko.de> Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Bo Shen <voice.shen@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: sama5d3: spl boot from fat fs SD cardBo Shen
Enable Atmel sama5d3xek boart spl boot support, which can load u-boot from SD card with FAT file system. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: add ddr2 initialization functionBo Shen
The MPDDRC supports different type of SDRAM This patch add ddr2 initialization function Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: sama5d3: early enable PIO peripheralsBo Shen
Enable the PIO peripherals early than other peripherals. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: sama5d3: the offset of MULA is 18Bo Shen
The offset of MULA field in PLLA register in sama5d3 is 18, and the length only 7 bits. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: sama5d3: correct the error define of DIVBo Shen
Correct the error define of DIV. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: at91: pm9261: remove undefined bit in mckrBo Shen
The PLLADIV2 bit is not defined in at91sam9261 SoC, so remove it. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-12-01arm: atmel: sama5d3: correct the ID for DBGU and PITBo Shen
As the DBGU and PIT has its own ID on sama5d3 SoC, while not share with SYS ID. So, correct them. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-11-29config: arm: exynos5250: remove duplicate definesLuka Perkov
The SPI section is already defined in this file (lines 268-288) so we can remove the duplicate definitions. While at it, also fix one tiny whitespace typo. Signed-off-by: Luka Perkov <luka@openwrt.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-11-26malta: set CONFIG_SYS_BOOTM_LEN to 64MBPaul Burton
Allow a larger kernel binary to be decompressed - the default 8MB can become limiting on a Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-26malta: enable PIIX4 SERIRQPaul Burton
Whilst U-boot does not require this itself, Linux currently relies upon it having been muxed and enabled by the bootloader. Thus in order to preserve compatibility with current kernels before a fix is merged in Linux we will enable the SERIRQ interrupt and mux it to its pin. Without doing this current kernels will never receive serial port interrupts and the end result is typically that userland appears to hang. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-26malta: correct UART baudratePaul Burton
CONFIG_SYS_NS16550_CLK specifies the rate of the clock 16x the baud rate. The SMSC FDC37M81x datasheet states that a divider of 1 results in a UART at 115200 baud, thus the x16 clock rate is 115200 * 16. Previously the divider was left at 0 which led to a rate of 38400 baud regardless of CONFIG_BAUDRATE or the baudrate environment variable. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-26mips: don't hardcode Malta env baudratePaul Burton
The baudrate passed to Linux in the environment was hardcoded at 38400. Instead pass the correct baudrate from global data, allowing Linux to correctly inherit the baudrate used by U-boot when console setup is not explicitly specified. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-11-25Prepare v2014.01-rc1Tom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2013-11-25t2080qds/ramboot: enable PBL tool for t2080qdsShengzhou Liu
Add the default RCW(SerDes 0x66_0x16) and PBI configure file for T2080QDS board, so we can use PBL tool to generate the ramboot image to support boot from NAND/SPI/SD. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2013-11-25powerpc/t2080qds: add support for t2080qds boardShengzhou Liu
The T2080QDS is a high-performance computing evaluation, development and test platform supporting the T2080 QorIQ Power Architecture processor. T2080QDS feature overview Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz Memory: - Single memory controller capable of supporting DDR3 and DDR3-LV devices - Two DDR3 DIMMs up to 4GB, Dual rank @ 2133MT/s and ECC support Ethernet interfaces: - Two 1Gbps RGMII on-board ports - Four 10Gbps XFI on-board cages - 1Gbps/2.5Gbps SGMII Riser card - 10Gbps XAUI Riser card Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes: - 16 lanes up to 10.3125GHz - Supports Aurora debug, PEX, SATA, SGMII, sRIO, HiGig, XFI and XAUI IFC: - 128MB NOR Flash, 512MB NAND Flash, PromJet debug port and FPGA eSPI: - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040) USB: - Two USB2.0 ports with internal PHY (one Type-A + one micro Type-AB) PCIE: - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) SATA: - Two SATA 2.0 ports on-board SRIO: - Two Serial RapidIO 2.0 ports up to 5 GHz eSDHC: - Supports SD/SDHC/SDXC/eMMC Card I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports System Logic: - QIXIS-II FPGA system controll Debug Features: - Support Legacy, COP/JTAG, Aurora, Event and EVT Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: removed Makefile blank line at EOF, fix conflicts with moving DDR driver] Acked-by: York Sun <yorksun@freescale.com>
2013-11-25powerpc/mpc85xx: Add T2080/T2081 SoC supportShengzhou Liu
Add support for Freescale T2080/T2081 SoC. T2080 includes the following functions and features: - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz - 2MB L2 cache and 512KB CoreNet platform cache (CPC) - Hierarchical interconnect fabric - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving - Data Path Acceleration Architecture (DPAA) incorporating acceleration - 16 SerDes lanes up to 10.3125 GHz - 8 mEMACs for network interfaces (four 1Gbps MACs and four 10Gbps/1Gbps MACs) - High-speed peripheral interfaces - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz - Additional peripheral interfaces - Two serial ATA (SATA 2.0) controllers - Two high-speed USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Three eight-channel DMA engines - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T2080 and T2081: Feature T2080 T2081 1G Ethernet numbers: 8 6 10G Ethernet numbers: 4 2 SerDes lanes: 16 8 Serial RapidIO,RMan: 2 no SATA Controller: 2 no Aurora: yes no SoC Package: 896-pins 780-pins Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-11-25net/fman: Add support for 10GEC3 and 10GEC4Shengzhou Liu
There are more than two 10GEC in single FMAN in some SoCs(e.g. T2080). This patch adds support for 10GEC3 and 10GEC4. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2013-11-25Driver/IFC: Move Freescale IFC driver to a common driverYork Sun
Freescale IFC controller has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the driver to driver/misc and fix the header file includes. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: Update DDR driver to allow non-zero base addressYork Sun
The DRAM base has been zero for Power SoCs. It could be non-zero for ARM SoCs. Use a macro instead of hard-coding to zero. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25powerpc/mpc8xxx: Extend DDR registers' fieldsYork Sun
Some DDR registers' fields have expanded to accommodate larger values. These changes are backward compatible. Some fields are removed for newer DDR controllers. Writing to those fields are safely ignored. TIMING_CFG_2 register is fixed. Additive latency is added to RD_TO_PRE automatically. It was a misunderstanding in commit c360ceac. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: Add Freescale DDR driver for ARMYork Sun
Make PowerPC specific code conditional so ARM SoCs can reuse this driver. Add DDR3 driver for ARM. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xxYork Sun
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3 structure for 83xx, 85xx and 86xx. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
2013-11-25p1010rdb: enable mtdparts for NANDZhao Qiang
The default partition table matches the .dts files for these boards in Linux. This allows these partitions to be used by name with U-Boot's "nand" command. Signed-off-by: Zhao Qiang <B45475@freescale.com>
2013-11-25mpc85xx: Fix the offset of register address errorTang Yuantian
The offset of register address within GPIO module is just CONFIG_SYS_MPC85xx_GPIO_ADDR. So, fix it. The following platforms are confirmed: MPC8572, P1023, P1020, P1022, P2020, P4080, P5020, P5040, T4240, B4860. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
2013-11-25powerpc/t1040qds: Correct Maintainer name in boards.cfgPriyanka Jain
Update T1040QDS naem to Poonam Aggrwal. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
2013-11-25Merge branch 'sandbox1' of http://git.denx.de/u-boot-x86Tom Rini