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2018-01-12ARMv8: add optional Linux kernel image headerStephen Warren
Allow placing a Linux kernel image header at the start of the U-Boot binary. This is useful since the image header reports the amount of memory (BSS and similar) that U-Boot needs to use, but that isn't part of the binary size. This can be used by the code that loads U-Boot into memory to determine where to load U-Boot, based on other users of memory. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSETStephen Warren
Enable CONFIG_SYS_INIT_SP_BSS_OFFSET for all 64-bit Tegra boards. Place the stack/... 512KiB from the end of the U-Boot binary. This should be plenty to accommodate the current DTBs (max 64 KiB), early malloc region (6KiB), stack usage, and plenty of slack, while still not placing it too far away from the U-Boot binary. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12ARMv8: Allow dynamic early stack pointerStephen Warren
U-Boot typically uses a hard-coded value for the stack pointer before relocation. Implement option SYS_INIT_SP_BSS_OFFSET to instead calculate the initial SP at run-time. This is useful to avoid hard-coding addresses into U-Boot, so that can be loaded and executed at arbitrary addresses and thus avoid using arbitrary addresses at runtime. This option's value is the offset added to &_bss_start in order to calculate the stack pointer. This offset should be large enough so that the early malloc region, global data (gd), and early stack usage do not overlap any appended DTB. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12ARM: tegra: remove SPL config for non-SPL SoCsStephen Warren
No 64-bit Tegra uses SPL. Remove various unused definitions from config headers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12ARM: tegra: don't use CONFIG_SPL_TEXT_BASE when no SPLStephen Warren
64-bit Tegra don't use SPL, and soon won't define CONFIG_SPL_TEXT_BASE when building. Fix the binman .dts file so that it doesn't use undefined values. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-11Merge git://git.denx.de/u-boot-sunxiTom Rini
2018-01-12configs: sun50i: Enable eMMC on a64-olinuxinoJagan Teki
a64-olinuxino has 8GiB eMMC, enable it. Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-11Merge git://git.denx.de/u-boot-videoTom Rini
2018-01-11Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-01-11Merge git://git.denx.de/u-boot-socfpgaTom Rini
2018-01-11Merge git://git.denx.de/u-boot-usbTom Rini
2018-01-11board/BuR: drop LCDC clock manipulation from board codeHannes Schmelzer
The clock selection is done now from the am335x-fb code, so there is no more need doing this in the board code. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11board/BuR: provide real clock-frequency instead a dividerHannes Schmelzer
Actual am335x-fb implementation takes now a real clock frequency instead a divider. So this component doesn't need to know anymore some base frequency of the LCDC, we simply provide the pixel-clock frequency. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11am335x-fb: setup display PLLHannes Schmelzer
The LCDC IP-core an be feed from several clock sources, one of those is a dedicated DPLL for generating a dividable base-clock for this IP-core. The TRM specifies the maximum input frequency for the LCCD with 200 MHz, so we must not exceed this value with the PLL frequency (which can lock much higher). This patch tries every combination of multipliers and divisors of the PLL and the IP-core itself for getting as near as possible the the requested panel->pxl_clk. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11am335x-fb: cosmetic: fix coding styleHannes Schmelzer
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11am335x-fb: cosmetic: update-copyrightHannes Schmelzer
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11mach-omap2: add AM335x Display PLL register definitionHannes Schmelzer
Adds the register definition of the Display DPLL Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-10ls1088ardb: Add SD Secure boot target supportSumit Garg
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> [YS: run moveconfig.py -s] Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10armv8: ls1088a: SPL size reductionSumit Garg
Using changes in this patch we were able to reduce approx 8k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1088a/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1088a/ls1088a.c to keep board_early_init_f funcations in case of SPL build. 3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10armv8: fsl-layerscape: SPL size reductionSumit Garg
Compile-off mp.c and libfdt.c in case of SPL build. SPL size reduces by approx 2k. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10Powerpc: T208xQDS: Modify the comment of the CONFIG_FSL_PCIE_RESET macroBao Xiaowei
Remove duplicate macro CONFIG_FSL_PCIE_RESET and update its comment. It enables PCIe reset to fix link width 2x - 4x. Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10armv8: Implement workaround for Cortex-A53 erratum 855873Alison Wang
855873: An eviction might overtake a cache clean operation Workaround: The erratum can be avoided by upgrading cache clean by address operations to cache clean and invalidate operations. For Cortex-A53 r0p3 and later release, this can be achieved by setting CPUACTLR.ENDCCASCI to 1. This patch is to implement the workaround for this erratum. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10configs: Move SYS_DPAA_QBMAN to KconfigAhmed Mansour
The CONFIG_SYS_DPAA_QBMAN define is used by DPAA1 freescale SOCs to add device tree fixups that allow deep sleep in Linux. The define was placed in header files included by a number of boards, but was not explicitly documented in any of the Kconfigs. A description was added to the drivers/networking menuconfig and default selection for current SOCs that have this part Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10drivers/misc: Share qbman init between archsAhmed Mansour
This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Create new board/freescale/common/fsl_portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Add new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10armv8: layerscape: sata: refine port register configurationYuantian Tang
Sata registers PP2C and PP3C are used to control the configuration of the PHY control OOB timing for the COMINIT/COMWAKE parameters respectively. Calculate those parameters from port clock frequency. Overwrite those registers with calculated values to get better OOB timing. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10armv8: ls1088 : MC alignment should always be fixed to 512MBAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10Merge git://git.denx.de/u-boot-marvellTom Rini
2018-01-10build: Drop CONFIG_SPL_BUILD guards in some casesTom Rini
Given gcc-6.1 and later we can now safely have strings discarded when the functions are unused. This lets us drop certain cases of not building something so that we don't have the strings brought in when the code was discarded. Simplify the code now by dropping guards we don't need now. Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Thomas Abraham <thomas.ab@samsung.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Wenyou Yang <wenyou.yang@microchip.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-10fat write: Fixed a problem with the case of file names when writing filesJean-Jacques Hiblot
commit 21a24c3bf35b ("fs/fat: fix case for FAT shortnames") made it possible that get_name() returns file names with some upper cases. find_directory_entry() must be updated to take this account, and use case-insensitive functions to compare file names. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-10linux/kernel.h: Add ALIGN_DOWN macroMasahiro Yamada
Follow Linux commit ed067d4a859f ("linux/kernel.h: Add ALIGN_DOWN macro"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-10sh: Drop unreferenced CONFIG_* definesTuomas Tynkkynen
The following config symbols are only defined once and never referenced anywhere else: CONFIG_AP325RXA CONFIG_AP_SH4A_4A CONFIG_CPU_SH_TYPE_R CONFIG_ECOVEC CONFIG_ESPT CONFIG_MIGO_R CONFIG_MPR2 CONFIG_MS7720SE CONFIG_MS7722SE CONFIG_MS7750SE CONFIG_R0P7734 CONFIG_R2DPLUS CONFIG_RSK7203 CONFIG_RSK7264 CONFIG_RSK7269 CONFIG_SH7752EVB CONFIG_SH7753EVB CONFIG_SH7757LCR CONFIG_SH7763RDP CONFIG_SH7785LCR Most of them are config symbols named after the respective boards which seems to have been a standard practice at some point. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10ARM: Drop unreferenced CONFIG_MACH_* definesTuomas Tynkkynen
These macros are all defined once and never checked or used anywhere: CONFIG_MACH_ASPENITE CONFIG_MACH_DAVINCI_CALIMAIN CONFIG_MACH_DOCKSTAR CONFIG_MACH_EDMINIV2 CONFIG_MACH_GOFLEXHOME CONFIG_MACH_GONI CONFIG_MACH_GURUPLUG CONFIG_MACH_KM_KIRKWOOD CONFIG_MACH_OPENRD_BASE CONFIG_MACH_SHEEVAPLUG Almost all of them were only used for the mach_is_foo() logic in arch/arm/asm/mach-types.h that were dropped in commit f9dadaef8b75fa ("arm: Re-sync asm/mach-types.h with Linux Kernel v4.9") Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10configs: am57xx_evm: fix ethernet phy configurationSekhar Nori
Configure AM57xx EVMs for the exact PHY part that is present on the various boards. This makes U-Boot apply configurations needed for this PHY like centering the FLP timing. For configurations to take effect, DM_ETH needs to be enabled. Do that too. Tested on BeagleBoard x15 and AM571x IDK. Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-01-10Travis-CI: Split 't208xrdb t4qds t102*'-job into separate jobsPhilipp Tomsich
The 't208xrdb t4qds t102*' job is close to the time limit and sometimes fails, so this splits it into 3 separate jobs. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-10PCI: Drop CONFIG_TSI108_PCITuomas Tynkkynen
Last user of this option went away in 2015 in commit: d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support") Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10BCM283x ALT5 function for JTAG pinsHenry Zhang
BCM2835 ARM Peripherals doc shows gpio pins 4, 5, 6, 12 and 13 carry altenate function, ALT5 for ARM JTAG Signed-off-by: Henry Zhang <henryzhang62@yahoo.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10configs: stm32f746-disco: enable MMC related flagsPatrice Chotard
STM32F469-disco embeds an arm_pl180 mmc IP, so enable CMD_MMC, DM_MMC and ARM_PL180_MMCI flags. Also enables all filesystem command related flags : _ CMD_EXT2 _ CMD_EXT4 _ CMD_FAT _ CMD_FS_GENERIC _ CMD_GPT _ CMD_BOOTZ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10ARM: DTS: stm32: add MMC nodes for stm32f746-disco and stm32f769-discoPatrice Chotard
Add DT nodes to enable ARM_PL180_MMCI IP support for STM32F746 and STM32F769 discovery boards There is a hardware issue on these boards, it misses a pullup on the GPIO line used as card detect to allow correct SD card detection. As workaround, cd-gpios property is not present in DT. So SD card is always considered present in the slot. Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10ARM: DTS: stm32: add SDIO controller support for stm32f469-discoPatrice Chotard
STM32F469 SoC uses an arm_pl180_mmci SDIO controller. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10board: stm32: add stm32f469-discovery board supportPatrice Chotard
This board offers : _ STM32F469NIH6 microcontroller featuring 2 Mbytes of Flash memory and 324 Kbytes of RAM in BGA216 package _ On-board ST-LINK/V2-1 SWD debugger, supporting USB reenumeration capability: _ Mbed-enabled (mbed.org) _ USB functions: USB virtual COM port, mass storage, debug port _ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive touch screen _ SAI Audio DAC, with a stereo headphone output jack _ 3 MEMS microphones _ MicroSD card connector _ I2C extension connector _ 4Mx32bit SDRAM _ 128-Mbit Quad-SPI NOR Flash _ Reset and wake-up buttons _ 4 color user LEDs _ USB OTG FS with Micro-AB connector _ Three power supply options: _ Expansion connectors and Arduino™ UNO V3 connectors Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10ARM: DTS: stm32: add stm32f469-disco-u-boot dts filePatrice Chotard
_ Add gpio compatible and aliases for stm32f469 _ Add FMC sdram node _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl, pwrcfg and gpio nodes. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10ARM: DTS: add STM32F469 Discovery board supportPatrice Chotard
This DT file comes from kernel v4.15-rc1 stm32f469-pinctrl.dtsi header has been updated with correct STMicroelectronics Copyright. Remove the paragraph about writing to the Free Software Foundation's mailing address as requested by checkpatch. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10ram: stm32: add memory mapping selection supportPatrice Chotard
This allows to controls the memory internal mapping at address 0x0000 0000. We can either map at 0x0000 0000 : _ main flash memory _ system flash memory _ FMC bank1 (NOR/PSRAM 1 and 2) _ embedded SRAM _ FMC/SDRAM bank1 This is needed for future STM32F469-disco board Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10board: stm32f429-disco: switch to DM STM32 pinctrl and gpio driverPatrice Chotard
Use available DM stm32f7_gpio.c and pinctrl_stm32.c drivers instead of board GPIO initialization. Remove stm32_gpio.c which is no more used and migrate structs stm32_gpio_regs and stm32_gpio_priv into arch-stm32f4/gpio.h to not break compilation. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10board: stm32f429-disco: switch to DM STM32 clock driverPatrice Chotard
Use available DM clk_stm32f.c driver instead of dedicated mach-stm32/stm32f4/clock.c. Migrate periph_clock defines from stm32_periph.h directly in CLK driver. These periph_clock defines will be removed when STMMAC, TIMER2 and SYSCFG drivers will support DM CLK. Enable also CLK flag. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10mach-stm32: stmf32f4: timer: remove clock_get() callPatrice Chotard
In order to use common clock driver between STM32F4 and STM32F7, remove clock_get() call As APB_PSC is always set to 2, only case when clock_get(CLOCK_AHB) != clock_get(CLOCK_APB1) is kept Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10board: stm32f429-disco: switch to DM STM32 serial driverPatrice Chotard
Remove serial_stm32.c driver and uart init from board file, use available DM serial_stm32x7.c driver compatible for STM32F4/F7 and H7 SoCs. The serial_stm32x7.c driver will be renamed later with a more generic name as it's shared with all STM32 Socs. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10configs: stm32f429-disco: enable MISC, STM32_RCC, DM_RESET and STM32_RESETPatrice Chotard
This allows to support rcc MFD driver. By enabling all these flags, we need to increase malloc area to avoid crash during early stage. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10pinctrl: stm32: add stm32f4 pinctrl compatible stringsPatrice Chotard
STM32F4 SoCs uses the same pinctrl block as found into STM32F7 and H7 SoCs. We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl" compatible string into pinctrl_stm32.c. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10board: stm32f429-discovery: switch to DM STM32 sdram driverPatrice Chotard
Use available DM stm32_sdram.c driver instead of board SDRAM initialization. For that, enable OF_CONTROL, OF_EMBED and STM32_SDRAM flags. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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