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2018-03-30mmc: ftsdc010: Support High-Speed modeRick Chen
ftsdc010 dm driver has been disable High-Speed mode as default to work around Andes AE3XX platform's problem, because of it does not support High-Speed mode in commit id 73cd56b2df213c629191139e5c6705e069b6214f. But other platforms or SoCs maybe support this function. So High-Speed mode can be enabled from dts with cap-mmc-highspeed or cap-sd-highspeed property. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30doc: ae250: Describe riscv-linux booting via u-bootRick Chen
Simply record riscv-linux booting steps and messages from bbl via u-boot on QEMU in README.ae250. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30tools: mkimage: Support RISC-V archRick Chen
Add riscv uimage arch to support riscv-linux booting. It can Convert riscv-linux to image which can be booted by bootm command. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: bootm: Remove ATAGSRick Chen
ATAGS is not supported and will be replaced by DT in riscv-linux. So can be removed now. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: bootm: Support to boot riscv-linuxRick Chen
riscv-linux should use BBL (Berkeley bootloader) for loading the Linux kernel. U-Boot can play as FSBL(first stage bootloader) to boot BBL and riscv-linux. In BBL's init_first_hart(), it will pass dtb with a1. So implement bootm to pass arguments to BBL correctly. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix static const char * array declarationsRick Chen
It is reported by checkpatch.pl WARNING: static const char * array should probably be static const char * const Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix missing a blank line after declarationsRick Chen
It is reported by checkpatch.pl WARNING: Missing a blank line after declarations. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix alignment should match open parenthesisRick Chen
It is reported by checkpatch.pl. CHECK: Alignment should match open parenthesis Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix use of volatileRick Chen
It is reported by checkpatch.pl WARNING: Use of volatile is usually wrong: see Documentation/process/volatile-considered-harmful.rst Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-30riscv: checkpatch: Fix Macro argument reuseRick Chen
It is CHECK reported by checkpatch.pl CHECK: Macro argument reuse 'PTE' - possible side-effects? Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com>
2018-03-29Merge git://git.denx.de/u-boot-rockchipTom Rini
2018-03-28rockchip: sdhci: support 8bit bus-widthPhilipp Tomsich
The Rockchip-specific SDHCI wrapper does not process the 'bus-width' property in the SDHCI node. Consequently, the bus is always kept in 4bit mode, even if 8bit wide operation is available, supported and requested in the DTS. This change adds processing of the 'bus-width' property and sets the host capability flag for an 8bit wide bus, if set to 8. As the logic in sdhci.c does not support clearing the 4bit capability, we assume that 4bit operation is always supported. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: mmc: update MAINTAINERSPhilipp Tomsich
The Rockchip-specific wrappers to the DW-MMC and the SDHCI driver were not covered as part of what's maintained by the architecture maintainers. Add them here. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: defconfig: puma-rk3399: enable DMA for SDHCI controllerPhilipp Tomsich
For the RK3399-Q7, we have a fast eMMC connected in an 8 bit wide configuration to the SDHCI controller (sdhci@fe330000). Enable DMA within the SDHCI driver to get the best performance out of it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: rk3399: set fdtfileMark Kettenis
Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: clk: rk3188: update dpll settings to make EMAC workAlexander Kochetkov
The patch set dpll settings for 300MHz to values used by binary blob[1]. With new values dpll still generate 300MHz clock, but EMAC work. Probably with new values dpll generate more stable clock. dpll on rk3188 provide clocks to DDR and EMAC. With current dpll settings EMAC doesn't work on radxa rock. EMAC sends packets to network, but it doesn't receive anything. ifconfig shows a lot of framing errors. [1] https://github.com/linux-rockchip/u-boot-rockchip/blob/u-boot-rk3288/ tools/rk_tools/3188_LPDDR2_300MHz_DDR3_300MHz_20130830.bin Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28video: rk3288_mipi: Combine NULL check into IS_ERR_OR_NULL()Punit Agrawal
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28video: rk3288_mipi: check in rk_mipi_ofdata_to_platdataHeinrich Schuchardt
The error checking should also catch the case that no range has beeen defined. syscon_get_first_range() returns NULL if no range is defined. cf. rk3399_mipi.c Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28video: rk3399_mipi: Combine NULL check into IS_ERR_OR_NULL()Punit Agrawal
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28video: rk3399_mipi: correct error checkingHeinrich Schuchardt
Pointers are never negative. Use macro IS_ERR() for checking. cf. rk3288_mipi.c Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28usb: rockchip: remove duplicate assignement.Heinrich Schuchardt
Assigning f_rkusb->reboot_flag twice doesn't make sense. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28driver: ram: rockchip: rk3399: missing counter incrementHeinrich Schuchardt
If we want to check the duration we need to increment the counter. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driverAlexander Kochetkov
Clean the iomux definitions at grf_rk3188.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driverAlexander Kochetkov
Clean the iomux definitions at grf_rk3036.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3399: add support for I2C[123467]Philipp Tomsich
This adds support for the (to date unsupported) I2C controllers 1~4 and 6~7 (i.e. now all controllers except I2C5, which is not accessible on the RK3399-Q7, are supported by pinctrl). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28rockchip: pinctrl: rk3399: fix GPIO2B1 and GPIO2B2 shift valuePhilipp Tomsich
The shift values for GPIO2B1 and GPIO2B2 had in fact referred to GPIO2B0 and GPIO2B1, respectively. This substitutes the correct values. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-25Merge git://git.denx.de/u-boot-ubiTom Rini
2018-03-25Merge git://git.denx.de/u-boot-spiTom Rini
2018-03-25Merge git://git.denx.de/u-boot-i2cTom Rini
2018-03-25Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblazeTom Rini
Xilinx changes for v2018.05 - Fix mkimage recognition - Update all my fragments ZynqMP: - Use clk driver - Support loading elfs in el1 - Various DTS and defconfig changes - Enable newer pmufw versions - Support more clocks - Remove ep108 - Secure image support - Fix memtest setup Zynq: - Enabling watchdog driver - Support more clocks - defconfig changes fpga: - Simplify error path net: - GMII case update
2018-03-24Convert CONFIG_UBI_SILENCE_MSG to KconfigPetr Vorel
Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
2018-03-24Convert CONFIG_UBIFS_SILENCE_MSG to KconfigPetr Vorel
Introduce another difference from upstream (kernel) source in fs/ubifs/super.c: adding preprocessor condition as y variable in mount_ubifs() depends on CONFIG_UBIFS_SILENCE_MSG: fs/ubifs/super.c:1337:15: error: variable ?y? set but not used [-Werror=unused-but-set-variable] long long x, y; Not setting CONFIG_UBIFS_SILENCE_MSG in am335x_igep003x_defconfig and igep0032_defconfig. Although it was defined in their config headers, it depends on CMD_UBIFS which is not set for them. Signed-off-by: Petr Vorel <petr.vorel@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Heiko Schocher <hs@denx.de>
2018-03-24ubifs: Reintroduce using CONFIG_UBIFS_SILENCE_MSGPetr Vorel
Use of CONFIG_UBIFS_SILENCE_MSG was added in 147162dac6 ("ubi: ubifs: Turn off verbose prints") Then it was removed in ff94bc40af ("mtd, ubi, ubifs: resync with Linux-3.14") Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
2018-03-23omap3: spi: Correct ti, pindir-d0-out-d1-in parsingSjoerd Simons
The ti,pindir-d0-out-d1-in property is not expected to have a value according to the device-tree binding, so treat it as a boolean not a uint property. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-23Merge git://git.denx.de/u-boot-arcTom Rini
Alexey: 1. Significantly rework cache-related functionality. In particular that fixes coherency problems in some corner-cases, allows us to enable and disable caches in run-time and still have properly running system, finally support execution from real flash (before we used to run from DDR from the very beginning). 2. Remove string routines implemented in assembly. That allows us to build and run U-Boot on wide range of ARC cores with different configurations. I.e. whatever tuning is used on GCC's command-line we'll get code for desired flavor of ARC. Otherwise for each and every corner-case we would need to add ifdefs in assembly code to accommodate missing instructions etc. 3. Get use of GCC's garbage collector which helps to slim-down resulting image quite a bit. 4. Also now we may disable U-Boot self-relocation for ARC if needed either by platform or for debugging purposes.
2018-03-23ARC: bootm: Refactor GO and PREP subcommands implementationEugeniy Paltsev
Refactor GO and PREP subcommands implementation for a simpler override in the boards platform code. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-03-23MAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragmentsMichal Simek
Fix my fragments to list all files in the repo. Also fix path to for Xilinx Zynq SoC (mach-zynq) It should be the part of "ARM: zynq: move SoC sources to mach-zynq" (sha1: 0107f2403669f764ab726d0d404e35bb9447bbcc) And cover dts files in board MAINTAINERS files. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23tools: xilinx: Fix zynq/zynqmp image recognitionMichal Simek
There is an issue to recognize zynq or zynqmp image because header checking is just the same. That's why zynqmp images are recognized as zynq one. Check unused fields which are initialized to zero in zynq format (__reserved1 0x38 and __reserved2 0x44) which are initialized for zynqmp. This should ensure that images are properly recognized by: ./tools/mkimage -l spl/boot.bin Also show image type as ZynqMP instead of Zynq which is confusing. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Alexander Graf <agraf@suse.de>
2018-03-23arm64: zynqmp: Add support for verifying secure imagesSiva Durga Prasad Paladugu
This patch adds new command "zynqmp" to handle zynqmp specific commands like "zynqmp secure". This secure command is used for verifying zynqmp specific secure images. The secure image can either be authenticated or encrypted or both encrypted and authenticated. The secure image is prepared using bootgen and will be in xilinx specific BOOT.BIN format. The optional key can be used for decryption of encrypted image if user key was specified while creation BOOT.BIN. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: Remove ep108 boardMichal Simek
ZynqMP Emulation board is no longer tested and there is no reason to keep maintaining it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: Correct EG/EV part detection logicSiva Durga Prasad Paladugu
The vcu disable bit in efuse ipdisable register is valid only if PL powered up so, consider PL powerup status for determing EG/EV part. If PL is not powered up, ignore EG/EV part of string. The PL powerup status will be filled by pmufw based on PL PROGB status in the 9th bit of version field. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dumpVipul Kumar
This patch print pl clocks (pl0...pl3) and watchdog clock using clk dump. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or moreVipul Kumar
NAND erase was not happening for size 1GiB or more. Erase command was executing successfully but in actual, it was not erasing. This patch fixed erase issue for 1 GiB or more size nand. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm: zynq: Remove OF_EMBED configuration for zc770 xm011 x16Michal Simek
Use appended dtb which is default option for zynq boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm: zynq: Setup the same bootcommand as for zc770 xm011 x8Michal Simek
The same command should be used for x16 configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm64: zynqmp: Changed scratch address used by the alternate memory testVipul Kumar
This patch changed CONFIG_SYS_MEMTEST_SCRATCH address to the accessible DDR address used by alternate memory test. Before this, 0xfffc0000 address was used, which is the OCM address and not enabled in MMU table. So, whenever trying to access 0xfffc0000 address, got Synchronous Abort exception. After changing CONFIG_SYS_MEMTEST_SCRATCH address, alternate memory test is working fine. Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm: zynq: Enable cadence driver on zc706Michal Simek
Enable watchdog with reset-on-timeout feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23arm: zynq: Wire watchdog internalsMichal Simek
Watchdog is only enabled in full u-boot. Adoption for SPL should be also done because that's the right place where watchdog should be enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23watchdog: Add Cadence watchdog driverShreenidhi Shedi
This IP can be found on Zynq and ZynqMP devices. The driver was tested with reset-on-timeout; feature. Also adding WATCHDOG symbol to Kconfig because it is required. Signed-off-by: Shreenidhi Shedi <imshedi@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23clk: zynq: Show watchdog clock rate properlyMichal Simek
watchdog clock is also connected to cpu 1X clocksource. Zynq> clk dump ... Before: swdt 4294967290 After: swdt 111111110 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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