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2015-10-30imx: hab: use read_fuse for secure boot settingsAdrian Alonso
Use read_fuse api fuction call to read secure boot fuse settings (enabled/disabled). Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30arm: imx: add secure boot fuse details for imx7 SoCAdrian Alonso
Add secure boot fuse details (location) bank = 1, word = 3; for imx7 SoC platforms. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30arm: imx: add secure boot fuse details for imx6 SoCAdrian Alonso
Add secure boot fuse details (location) bank = 0, word = 6; for imx6 SoC platforms. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30imx: hab: add secure boot fuse detailsAdrian Alonso
Add secure boot fuse helper struct to abstract the way to find out secure boot settings per SoC iMX family Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30imx: hab: rework unified rom section for mx7Adrian Alonso
Rework unified section macro select via Kconfig option instead of macro definition in mx7_common header file. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30imx: hab: use unified rom section for mx6sx and mx6ulAdrian Alonso
Add CONFIG_ROM_UNIFIED_SECTIONS for mx6sx and mx6ul target platforms to resolve corresponding HAB_RVT_BASE base address, the RVT table contains pointers to the HAB API functions in ROM code. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30imx: hab: rework secure boot support for imx6Adrian Alonso
Rework secure boot support for imx6, move existing hab support for imx6 into imx-common for SoC reuse. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30imx: cpu: move common chip revision id'sAdrian Alonso
Move common chip revision id's to main cpu header file mx25 generic include cpu header for chip revision Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2015-10-30imx: mx6sabresd: add i.MX6DQP Sabresd supportPeng Fan
Add i.MX6DQP-Sabresd board support: 1. set fdt_file according to board_rev which is set at runtime. 2. Add mx6dqp_ddr_ioregs and calibration value for this board. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-30imx: mx6sabresd discard PHYS_SDRAM_SIZEPeng Fan
This macro is not needed, since gd->ram_size is assigned value using function imx_ddr_size(). Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-30imx35, flea3: add FIT image supportHeiko Schocher
add FIT image support for the flea3 board. Signed-off-by: Heiko Schocher <hs@denx.de>
2015-10-30ts4800: add CONFIG_OF_LIBFDTDamien Riegel
Linux only boots IMX.51-based boards with device tree, so this board would benefit from supporting it. Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com> Cc: Stefano Babic <sbabic@denx.de>
2015-10-30arm, imx6, aristainetos2: set gpr register after resetHeiko Schocher
setting the gpr 1,8 and 12 registers to a fix value. This is needed because after a WDT reset, this registers are not correct resettet, and prevent linux from booting again. Signed-off-by: Heiko Schocher <hs@denx.de>
2015-10-30arm, imx: add some gpr register definesHeiko Schocher
add some missing gpr register defines. Signed-off-by: Heiko Schocher <hs@denx.de>
2015-10-30driver: misc: add MXC_OCOTP Kconfig entryPeng Fan
Add MXC_OCOTP Kconfig entry. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-30imx-common: timer: clean up codePeng Fan
We can reuse common functions in lib/time.c, but not reimplement functions in imx-common/time.c. Only keep timer_init ,get_tbclk and implement timer_read_counter in imx-common/time.c. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-30Merge branch 'master' of git://git.denx.de/u-bootStefano Babic
2015-10-30README.scrapyard: Populate recent ppc4xx removalsTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-29Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2015-10-29net: eth: Check return value in various placesBin Meng
eth_get_dev() can return NULL which means device_probe() fails for that ethernet device. Add return value check in various places or U-Boot will crash due to NULL pointer access. With this commit, 'dm_test_eth_act' test case passes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29dm: test: Add a new test case against dm eth codes for NULL pointer accessBin Meng
U-Boot crashes when doing a 'ping' with the following test scenario: - All ethernet devices are not probed - "ethaddr" for all ethernet devices are not set - "ethact" is set to a valid ethernet device name Add a new test case 'dm_test_eth_act' to hit such scenario. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: eth: Clear MAC address in eth_pre_remove()Bin Meng
platdata->enetaddr was assigned to a value in dev_probe() last time. If we don't clear it, for dev_probe() at the second time, dm eth will end up treating it as a MAC address from ROM no matter where it came from originally (maybe env, ROM, or even random). Fix this by clearing platdata->enetaddr when removing an Ethernet device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29dm: core: Remove unnecessary codes in uclass_pre_remove_device()Bin Meng
dev->uclass->uc_drv->per_device_auto_alloc_size is to be freed in device_free(), so is dev->seq. Remove these unnecessary codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-10-29net: pch_gbe: Add driver remove supportBin Meng
In pch_gbe_probe(), some additional resources are allocated (eg: mdio, phy). We should free these in the driver remove phase. Add pch_gbe_remove() to clean it up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: designware: Add driver remove supportBin Meng
In designware_eth_probe(), some additional resources are allocated (eg: mdio, phy). We should free these in the driver remove phase. Add designware_eth_remove() to clean it up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-10-29net: mdio: Add mdio_free() and mdio_unregister() APIBin Meng
Currently there is no API to uninitialize mdio. Add two APIs for this. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: phy: Test previous phydev->dev against new mac devBin Meng
In phy_connect_dev(), if the phy device has an accociated mac device before, a warning message will be printed. But we should test the old device against the new one, if they are actually the same one, don't print the warning message. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: phy: Change to print all phys that are not foundBin Meng
In get_phy_device_by_mask(), when no phy is found, currently we only print a message to show the first phy address that is not found. But this is not always the case as multiple phys can be specified by phy_mask. Change to print all phys that are not found, and to reduce the console boot log, change to use 'debug' instead of 'printf'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: phy: Don't create phy device when there is no phyBin Meng
In get_phy_device_by_mask(), when no phy is found, we should not create any phy device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: phy: micrel: disable NAND-tree for KSZ8051Sylvain Rochet
NAND-tree is used to check wiring between MAC and PHY using NAND gates on the PHY side, hence the name. NAND-tree initial status is latched at reset by probing the IRQ pin. However some devices are sharing the PHY IRQ pin with other peripherals such as Atmel SAMA5D[34]x-EK boards when using the optional TM7000 display module, therefore they are switching the PHY in NAND-tree test mode depending on the current IRQ line status at reset. This patch ensure PHY is not in NAND-tree test mode only for the Micrel KSZ8051 PHY used by Atmel. There are other Micrel PHY affected but I doubt they are used on such weird hardware design. Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: rtl8169: Build warning fixes for 64-bitStephen Warren
Casting from dev->priv to pci_dev_t changes the value's size on a 64-bit system. This causes the compiler to complain about casting a pointer to an integer of a different (smaller) size. To avoid this, cast to an integer of matching size first, then perform an int->int cast to perform the size change. This signals explicitly that we do want to change the size, and avoids the compiler warning. This is legitimate since we know the pointer actually stores a small integer, not a pointer value. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: Increase the size of the net_boot_file_name bufferJacob Stiffler
The net_boot_file_name buffer is used as storage for the bootfilename command line argument to network boot commands such as tftp and nfs. Increase the size of this buffer to 1024 bytes as the current size of 128 bytes is restrictive for arbitrary paths on the server. Signed-off-by: Jacob Stiffler <j-stiffler@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: phy: micrel: add support for KSZ8021RNL & KSZ8031RNLSylvain Lemieux
This patch adds support for Micrel KSZ8021RNL & KSZ8031RNL. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29smsc95xx: Use zero length packets when RX fifo is emptyStefan Brüns
Using NAKs on empty RX fifo for bulk in transfers is the right choice for a interrupt driven model, but U-Boot uses polling and expects an immediate answer if there is no incoming packet. Using ZLP Bulk In Response (BIR) mode avoids unexpected timeouts in the host controller driver. As ZLP mode is reset default, there is no need to set it. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: parse DHCP options from overloaded file/sname fieldsStefan Brüns
If Option 52 in the vendor option field signals overloading of the file and/or sname fields, these field may contain additional options. Formatting of file/sname contained options is the same as in the vendor options field, but without the leading magic. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29net: Do not overwrite options found in overloaded 'file' fieldStefan Brüns
If 'file' is overloaded, it is wrong to get or put the bootfile name from it/to it. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-29arm: ls1021a: Add sata support on qds and twr boardtang yuantian
Freescale ARM-based Layerscape LS102xA contain a SATA controller which comply with the serial ATA 3.0 specification and the AHCI 1.3 specification. This patch adds SATA feature on ls1021aqds and ls1021atwr boards. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29arm: ls102xa: Set fdt_high and initrd_high to the value of 0xffffffffAlison Wang
As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel fails to access the device tree blob on boot. The reason is that u-boot relocates the device tree blob into high memory when booting the kernel and the kernel is unable to access the blob. To avoid this issue, fdt_high is set to the value of 0xffffffff. The device tree blob will not get relocated and is still in low memory to make it accessible to the kernel. For the same reason, initrd_high is set to the value of 0xffffffff too. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043a: Enable secondary coresHou Zhiqiang
After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to make secondary cores excute in spin loop. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add sd boot supportGong Qianyu
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardbYangbo Lu
This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043a: Add Fman supportShaohui Xie
Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add nand boot supportGong Qianyu
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/ls1043ardb: Add LS1043ARDB board supportMingkai Hu
LS1043ARDB Specification: ------------------------- Memory subsystem: * 2GByte DDR4 SDRAM (32bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * XFI 10G port * QSGMII with 4x 1G ports * Two RGMII ports PCIe: * PCIe2 (Lanes C) to mini-PCIe slot * PCIe3 (Lanes D) to PCIe slot USB 3.0: two super speed USB 3.0 type A ports UART: supports two UARTs up to 115200 bps for console Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
2015-10-29armv8/fsl_lsch2: Add fsl_lsch2 SoCMingkai Hu
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with ARMv8 cores and 2rd generation of Chassis. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu
There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net/fm: fix MDIO controller base on FMAN2Shaohui Xie
MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two FMANs, so we should only define MDIO controller base on FMAN2 when there is FMAN2. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net/fm: Add QSGMII PCS initShaohui Xie
QSGMII PCS needed to be programmed same as SGMII PCS, and there are four ports in QSGMII PCS, port 0, 1, 2, 3, all the four ports shared port 0's MDIO controller, so when programming port 0, we continue to program other three ports. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net: Move some header files to include/Shaohui Xie
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29net: fm: bug fix when CONFIG_PHYLIB not definedShaohui Xie
codes related to phylib operations should be wrapped by CONFIG_PHYLIB. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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