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2017-05-10rockchip: spi: rewrite rkspi_set_clk for a more conservative baudrate settingPhilipp Tomsich
The baudrate in rkspi was calculated by using an integer division (which implicitly discarded any fractional result), then rounding to an even number and finally clamping to 0xfffe using a bitwise AND operator. This introduced two issues: 1) for very small baudrates (overflowing the 0xfffe range), the bitwise-AND generates rather random-looking (wildly varying) actual output bitrates 2) for higher baudrates, the calculation tends to 'err towards a higher baudrate' with the actual error increasing as the dividers become very small. E.g., with a 99MHz input clock, a request for a 20MBit baudrate (99/20 = 4.95), a 24.75 MBit would be use (which amounts to a 23.75% error)... for a 34 MBit request this would be an actual outbout of 49.5 Mbit (i.e. a 45% error). This change rewrites the divider selection (i.e. baudrate calculation) by making sure that a) for the normal case: the largest representable baudrate below the requested rate will be chosen; b) for the denormal case (i.e. when the divider can no longer be represented), the lowest representable baudrate is chosen. Even though the denormal case (b) may be of little concern in real world applications (even with a 198MHz input clock, this will only happen at below approx. 3kHz/3kBit), our board-verification team kept complaining. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-05-10rockchip: spi: rk_spi: dynamically select an module input ratePhilipp Tomsich
The original clock/bitrate selection code for the rk_spi driver was a bit limited, as it always selected a 99MHz input clock rate (which would allow for a maximum bitrate of 49.5MBit/s), but returned -EINVAL if a bitrate higher than 48MHz was requested. To give us better control over the bitrate (i.e. add more operating points, especially at "higher" bitrate---such as above 9MBit/s), we try to choose 4x the maximum frequency (clamped to 50MBit) from the DTS instead of 99MHz... for most use-cases this will yield a frequency of 198MHz, but is flexible to go beyond this in future configurations. This also rewrites the check to allow frequencies of up to half the SPI module rate as bitrates and then clamps to whatever the DTS allows as a maximum (board-specific) frequency and does away with the -EINVAL when trying to select a bitrate (for cases that exceeded the hard limit) and instead consistently clamps to the lower of the hard limit, the soft limit for the SPI bus (from the DTS) or the soft limit for the SPI slave device. This replaces "rockchip: spi: rk_spi: select 198MHz input to the SPI module for the RK3399" "rockchip: spi: rk_spi: improve clocking code for the RK3399" from earlier versions of this series. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-05-10rockchip: clk: rk3399: fix off-by one during rate calculation in ↵Philipp Tomsich
i2c/spi_set_rate For the RK3399, i2c_set_rate (and by extension: our spi_set_rate, which had been mindlessly following the template of the i2c_set_rate implementation) miscalculates the rate returned due to a off-by-one error resulting from the following sequence of events: 1. calculates 'src_div := src_freq / target_freq' 2. stores 'src_div - 1' into the register (the actual divider applied in hardware is biased by adding 1) 3. returns the result of the DIV_RATE(src_freq, src_div) macro, which expects the (decremented) divider from the hardware-register and implictly adds 1 (i.e. 'DIV_RATE(freq, div) := freq / (div + 1)') This can be observed with the SPI driver, which sets a rate of 99MHz based on the GPLL frequency of 594MHz: the hardware generates a clock of 99MHz (src_div is 6, the bitfield in the register correctly reads 5), but reports a frequency of 84MHz (594 / 7) on return. To fix, we have two options: * either we bias (i.e. "DIV_RATE(GPLL, src_div - 1)"), which doesn't make for a particularily nice read * we simply call the i2c/spi_get_rate function (introducing additional overhead for the additional register-read), which reads the divider from the register and then passes it through the DIV_RATE macro Given that this code is not time-critical, the more readable solution (i.e. calling the appropriate get_rate function) is implemented in this change. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5Philipp Tomsich
This change adds support for configuring the module clocks for SPI1 and SPI5 from the 594MHz GPLL. Note that the driver (rk_spi.c) always sets this to 99MHz, but the implemented functionality is more general and will also support different clock configurations. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: video: Makefile: Modify Makefile for rockchip video drivereric.gao@rock-chips.com
Modify Makefile for rockchip video driver according to Kconfig, so that source code will not be compiled if not needed. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: video: Kconfig: Add Kconfig for rockchip video drivereric.gao@rock-chips.com
1. add Kconfig for rockchip video driver, so that video port can be selected as needed. 2. move VIDEO_ROCKCHIP option to new Kconfig for concision. Signed-off-by: Eric Gao <eric.gao@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Drop indenting in Kconfig: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: rk3399: correct memory regionKever Yang
RK3399 device memory region is 0xf8000000~0xffffffff. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: clk: rk3328: add ciu_clk entry for eMMC/SDMMCXu Ziyuan
The genunie bus clock is sclk_x for eMMC/SDMMC, add support for it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIOXu Ziyuan
The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIOXu Ziyuan
The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: clk: rk3036: add ciu_clk entry for eMMC/SDIOXu Ziyuan
The genunie bus clock is sclk_x for eMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10mmc: dw_mmc: rockchip: select proper card clockXu Ziyuan
As you know, biu_clk is used for AMBA AHB/APB interface, ciu_clk is used for communication between host and card devices. The real bus clock is ciu, so let's rectify it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10mkimage: rockchip: add support for rk3328Kever Yang
Add support for rk3328 package header in mkimage tool. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: rk3399: use regulators_enable_boot_on() to init regulatorKever Yang
Use regulators_enable_boot_on() instead of init regulators one by one, the interface can init all the regulators with regulator-boot-on property. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-09power: twl4030: Remove CONFIG_TWL4030_POWER from include/configsAdam Ford
With the addition of Kconfig now having CONFIG_TWL4030_POWER and with that being the default when OMAP34XX is selected, this is no longer needed in include/configs and can be removed from the whitelist. This has only been tested on logic PD DM3730 using ti_omap3_common.h Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09power: twl4030: Move CONFIG_TWL4030_POWER to KconfigAdam Ford
As requested, I added the CONFIG_TWL4030_POWER to Kconfig and made it the implied default when selecting OMAP34XX as a platform. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09power: twl4030: Add CONFIG_CMD_POWEROFF supportAdam Ford
With the addition of twl4030_power_off(), let's allow the 'poweroff' command to run this function when CONFIG_CMD_POWEROFF is enabled. Tested on a DM3730 with twl4030 PMIC. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-05-09omap3_logic: Add Device Tree Support and more DM driversAdam Ford
This patch also removes all the excessive code for NS16550 intiailization as the device tree can do that now. This also adds DM_I2C and DM_MMC since the overlying drivers have the built-in support already. The corresponding include/config/omap3_logic.h also reduced in size due to the new device tree support. Signed-off-by: Adam Ford <aford173@gmail.com> Changes in V2: Retain Auto-detect ability between SOM-LV and Torpedo Split this off from the device sub submissions
2017-05-09ARM: DTS: Add Logic PD DM3730 Torpedo Device TreeAdam Ford
Previous commit has this combined with SOM-LV. This commit has only the Torpedo Device Tree. The device trees were sync'd with 4.9.y stable with two changes: disable mmc2 and stdout-path = &uart1. Both of those two changes will be submitted to the linux-omap list Signed-off-by: Adam Ford <aford173@gmail.com> Changes in V2: Split device tree from other board
2017-05-09ARM: DTS: Add Logic PD DM3730 SOM-LV initial supportAdam Ford
This adds the device tree. Previous commit added both boards at the same time. Signed-off-by: Adam Ford <aford173@gmail.com> Changes in V2: Split the SOM-LV from Torpedo
2017-05-09OMAP3: Add SMSC9221 device tree for omap devices connected on GPMC.Adam Ford
Some OMAP3 devices support an SMSC ethernet PHY connected to the GPMC bus. This copies this device tree from Linux 4.9.y stable Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09omap3: Copy twl4030 device tree from Linux 4.9.y stableAdam Ford
Many OMAP3 boards use a TWL4030 PMIC. This brings in the related device tree information for common TWL4030 and TWL4030 with OMAP3. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09ARM: OMAP: I2C: Support New read, write and probe functions for OMAP3Adam Ford
New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 (4430/60/70), OMAP5 (5430) and AM335X (3359) were added in 960187ffa125( "ARM: OMAP: I2C: New read, write and probe functions") but not tested on OMAP3. This patch will allow the updated drivers using device tree and DM_I2C to operate on OMAP3. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09omap3630: Copy Device tree from Linux 4.9.y stableAdam Ford
Add device tree support to allow for CONFIG_OF_CONTROL in OMAP3630 boards. DM3730 can use this same device tree. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09omap3: Copy Device tree from Linux 4.9.y stableAdam Ford
Add device tree support to allow for CONFIG_OF_CONTROL in OMAP3 boards. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-05-09omap_hsmmc: update struct hsmmc to accommodate omap3 from DTAdam Ford
This patch changes the way DM_MMC calculates offset to the base register of MMC. Previously this was through an #ifdef but that wasn't necessary for OMAP3. This patch will now add in the offset to the base address based on the .compatible flags. Signed-off-by: Adam Ford <aford173@gmail.com> V2: Remove ifdef completely and reference offset from the omap_hsmmc_ids table. V1: Change ifdef to ignore OMAP3 Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09Allow boards to initialize the DT at runtime.Alex Deymo
In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09bcm2835_wdt: support for the BCM2835/2836 watchdogPaolo Pisati
Signed-off-by: Paolo Pisati <p.pisati@gmail.com>
2017-05-09arm: rpi: Add a TODO to move all messages into the msg handlerSimon Glass
The board code should all move into msg.c for consistency. Add a TODO for this. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09dm: video: arm: rpi: Convert to use driver model for videoSimon Glass
Adjust the video driver to work with driver model and move over existing baords. There is no need to keep the old code. We can also drop setting of CONFIG_FB_ADDR since driver model doesn't have this problem. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
2017-05-09dm: video: Add driver-model support to lcd_simplefbSimon Glass
Allow this to work with CONFIG_DM_VIDEO enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
2017-05-09dm: video: Refactor lcd_simplefb to prepare for driver modelSimon Glass
Adjust this function so that we can convert it to support CONFIG_DM_VIDEO without a lot of code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
2017-05-09video: arm: rpi: Move the video settings out of the driverSimon Glass
Add a function to set the video parameters to the msg handler and remove it from the video driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
2017-05-09video: arm: rpi: Move the video query out of the driverSimon Glass
Add a function to get the video size to the msg handler and remove it from the video driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
2017-05-09dm: arm: rpi: Drop CONFIG_OF_EMBEDSimon Glass
We should not use an embedded device tree on a production board. There does not seem to be any reason for it in commit 7670909. So drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09dm: mmc: rpi: Convert Raspberry Pi to driver model for MMCSimon Glass
Convert the bcm2835 SDHCI driver over to support CONFIG_DM_MMC and move all boards over. There is no need to keep the old code since there are no other users. Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09arm: rpi: Add a function to obtain the MMC clockSimon Glass
Move this code into the new message handler file. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09arm: rpi: Add a file to handle messagesSimon Glass
The bcm283x chips provide a way for the ARM core to communicate with the graphics processor, which is in charge of many things. This is handled by way of a message prototcol. At present the code for sending message (and receiving a reply) is spread around U-Boot, primarily in the board file. This means that sending a message from a driver requires duplicating the code. Create a new message implementation with a function to support powering on a subsystem as a starting point. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09dm: arm: rpi: Use driver model for EthernetSimon Glass
Enable CONFIG_DM_ETH so that driver model is used for the USB Ethernet device. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09dm: arm: rpi: Move to driver model for USBSimon Glass
Start using driver model for USB on the Raspberry Pi. The dwc2 supports this now so this is just a config change. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09arm: rpi: Drop CONFIG_CONS_INDEXSimon Glass
This is not needed now that serial uses driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09arm: rpi: Drop the GPIO device addressesSimon Glass
We can rely on the device tree to provide this information. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09string: Use memcpy() within memmove() when we canSimon Glass
A common use of memmove() can be handled by memcpy(). Also memcpy() includes an optimisation for large sizes: it copies a word at a time. So we can get a speed-up by calling memcpy() to handle our move in this case. Update memmove() to call memcpy() if the destination is before the source. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-09net: smsc95xx: Correct free_pkt() implementationSimon Glass
On further review this returns the wrong packet length from the driver. It may not be noticed since protocols will take care of it. Fix it by subtracting the header length from the packet length returned. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09Merge git://git.denx.de/u-boot-dmTom Rini
2017-05-09Merge git://www.denx.de/git/u-boot-marvellTom Rini
2017-05-09defconfig: dra7xx_evm: enable CONFIG_BLK and disk driver model for SCSIJean-Jacques Hiblot
Enable disk driver model for dra7xx_evm as dwc_ahci supports driver model. As a consequence we must also enable CONFIG_BLK and CONFIG_DM_USB. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Dropped CONFIG_SPL_PHY=y in sandbox_spl to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-09drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata deviceJean-Jacques Hiblot
Implement a sata driver for Synopsys DWC sata device based on U-boot driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09dra7: dtsi: mark ocp2scp bus compatible with "simple-bus"Jean-Jacques Hiblot
This is needed to probe devices under that bus such as the SATA PHY. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-09drivers: phy: add PIPE3 phy driverJean-Jacques Hiblot
This phy is found on omap platforms with sata capabilities. Except for the part related to the DM and the PHY framework, the code is basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>