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2019-09-04Revert "net: macb: Fixed reading MII_LPA register"Bin Meng
This reverts commit 1b0c9914cc75d1570359181ebd493cd5746cb0ed. Commit 1b0c9914cc75 ("net: macb: Fixed reading MII_LPA register") causes 100Mbps does not work any more with SiFive FU540 GEM on the HiFive Unleashed board. Revert it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04network: set timeline for CONFIG_DM_ETH conversionHeinrich Schuchardt
The driver model has been supported for network drivers since 2015. It is time to convert the remaining boards. Set July 2020 as a timeline. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: fsl_enet_mdio: fix missing terminator in PCI ID arrayAlex Marginean
It was missing in the original submission and not having it in place causes issues with probing of PCI devices. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: dwc_et_qos: update weak function board_interface_eth_initPatrick Delaunay
Align the board and driver prototype for board_interface_eth_init to avoid execution issue (the interface_type parameter is defined as int or phy_interface_t). To have a generic weak function (it should be reused by other driver) I change the prototype to use directly udevice. This prototype is added in netdev.h to allow compilation check and avoid warning when compiling with W=1 on file board/st/stm32mp1/stm32mp1.c warning: no previous prototype for 'board_interface_eth_init'\ [-Wmissing-prototypes] int board_interface_eth_init(int interface_type, .... ^~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: dwc_eth_qos: Change eqos_ops function to staticPatrick Delaunay
This patch solves many warnings when compiling with W=1: warning: no previous prototype for '....' [-Wmissing-prototypes] Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: pfe_eth: undefined return valueHeinrich Schuchardt
Do not use random value from stack as return value of pfe_phy_write(). Indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04test: dm_mdio: avoid out of bounds accessHeinrich Schuchardt
SANDBOX_PHY_REG_CNT is not an allowable index for the array u16 reg[SANDBOX_PHY_REG_CNT]. Identified by cppcheck. Fixes: b47edf8069cc ("test: dm_mdio: add a 2nd register to the emulated PHY") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: mvpp2: support setting hardware addresses from ethernet coreMatt Pelland
mvpp2 already has support for setting MAC addresses but this functionality was not exposed to the ethernet core. This commit exposes this functionality so that MAC address assignments stored in U-Boot's environment are correctly applied before Linux boots. Signed-off-by: Matt Pelland <mpelland@starry.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04arm: dts: Set custom names for cp110 master/slave MDIO busesAlex Marginean
Implicitly Marvell MDIO driver uses DT node names for devices, but in this case that is not unique. Set MDIO device names for master/slave to cpm/cps. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: add marvell MDIO driverAlex Marginean
This patch adds a separate driver for the MDIO interface of the Marvell Ethernet controllers based on driver model. There are two reasons to have a separate driver rather than including it inside the MAC driver itself: *) The MDIO interface is shared by all Ethernet ports, so a driver must guarantee non-concurrent accesses to this MDIO interface. The most logical way is to have a separate driver that handles this single MDIO interface, used by all Ethernet ports. *) The MDIO interface is the same between the existing mv643xx_eth driver and the new mvneta/mvpp2 driver. Even though it is for now only used by the mvneta/mvpp2 driver, it will in the future be used by the mv643xx_eth driver as well. This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE 802.3 Clause 45. This patch also adds device tree binding for marvell MDIO driver. Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04doc: bindings: add mdio.txt describing generic MDIO propertiesAlex Marginean
Adds a binding document for mdio. A notable deviation from corresponding Linux binding is the introduction of device-name optional property, which can be used to name MDIO buses. Two reset optional properties described by Linux binding are also not present as they don't seem to be used in U-Boot at this time. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-04net: mdio-uclass: name MDIO according to device-name property if presetAlex Marginean
Use the optional property device-name to name the MDIO bus. This works around limitations with using the DT node name on devices such as Armada-8040, which integrates two cp100 cores, both featuring MDIOs at the same relative offsets and with the same DT node names. The concept was originally proposed by Marvell as a custom property called mdio-name specific to Marvell driver. This patch uses the more generic property device-name and moves this into MDIO class code so other can use it as well. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-04configs: sandbox: enable PCAP capture cmdRamon Fried
Enable CONFIG_CMD_PCAP for testing PCAP capture. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04doc: pcap: add pcap cmd documentationRamon Fried
Add documentation for new "pcap" command. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: introduce packet capture supportRamon Fried
Add support for capturing ethernet packets and storing them in memory in PCAP(2.4) format, later to be analyzed by any PCAP viewer software (IE. Wireshark) This feature greatly assist debugging network issues such as detecting dropped packets, packet corruption etc. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Alex Marginean <alexm.osslist@gmail.com> Tested-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers/fsl-mc: Create Kconfig file to manage driver specific configs betterFlorinel Iordache
Create drivers/net/fsl-mc/Kconfig and move fsl-mc specific configs from arch/arm/cpu/armv8/fsl-layerscape/Kconfig to this new Kconfig Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04drivers: net: driver for MDIO muxes controlled over I2CAlex Marginean
This driver is used for MDIO muxes driven over I2C. This is currently used on Freescale LS1028A QDS board, on which the physical MDIO MUX is controlled by an on-board FPGA which in turn is configured through I2C. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-04Revert "drivers: net: driver for MDIO muxes controlled over I2C"Joe Hershberger
This reverts commit d9a9174fa5687521035b2ec82cce86cdcf4f36e6.
2019-09-04net: mdio: Clarify code flow Covarity 244085 & 244090Joe Hershberger
Document that the lack of breaks is intentional. Series-to: u-boot Series-cc: ti Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04net: Fix Covarity Defect 244093Joe Hershberger
Don't allow unterminated strings Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-03Merge tag 'arc-for-2019.10-rc4' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-arc These are some very late changes mostly required to get 64-bit division working on ARC boards. For that we had to import missing parts of libgcc and add compiler flags to EMSDP which otherwise used very simple profile for compliation. And while at it another fix for EM SDP initialization is inluded as well.
2019-09-03arc: emsdp: Add more platform-specific compiler optionsAlexey Brodkin
Even though EM SDP is FPGA-based board and different FPGA images (known as .bit-files) are awailable for the board still there's a common subset of options we may rely on for all configs. These are: * Normalizer * Swap instructions * Simple multiplier * Barrel-shifter * Floating-point unit * Shorter instructions (code density) This among other improvements allows to compile code with 64-bit divisions, see [1]. [1] https://patchwork.ozlabs.org/patch/1156541/ Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Kever Yang <kever.yang@rock-chips.com>
2019-09-03arc: libgcc: Import __udivdi3 & __udivmoddi4 to allow 64-bit divisionAlexey Brodkin
As reported by Kever here [1] we were unable to compile 64-bit division code due to missing definition of __udivdi3(). Import its implementation and __udivmoddi4() as its direct dependency from today's libgcc [2]. [1] https://patchwork.ozlabs.org/patch/1146845/ [2] https://github.com/gcc-mirror/gcc/commit/5d8723600bc0eed41226b5a6785bc02a053b45d5 Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Kever Yang <kever.yang@rock-chips.com>
2019-09-03arc: emsdp: Add initialization of PSRAMAlexey Brodkin
If the "Page Mode" is not enabled on the device, read operations from PSRAM may result in incorrect data. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-09-03Merge tag 'for-v2019.10-v2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-i2c i2c bugfixes for 2019.10 take 2 - i2c: mxc: add CONFIG_CLK support If CONFIG_CLK is enabled use clk framework for clock settings.
2019-09-02Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- Skip unavailable hart in the get_count(). - fu540 set serial env from otp. - fu540 add mmc0 as a boot target device. - Update fix_rela_dyn and add absolute reloc addend. - Andestech PLIC driver will skip unavailable hart. - Support Andestech V5L2 cache driver.
2019-09-03riscv: cache: use CCTL to flush d-cacheRick Chen
Use CCTL command to do d-cache write back and invalidate instead of fence. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: dts: move out AE350 L2 node from cpus nodeRick Chen
When L2 node exists inside cpus node, uclass_get_device can not parse L2 node successfully. So move it outside from cpus node. Also add tag-ram-ctl and data-ram-ctl attributes for v5l2 cache controller driver. This can adjust timing by requirement from dtb to improve performance. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: cache: Flush L2 cache before jump to linuxRick Chen
Flush and disable L2 cache in dcache_disable() which will be called in cleanup_before_linux() before jump to linux. The sequence will be preferred as below: L1 flush -> L1 disable -> L2 flush -> L2 disable Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: ax25: add imply v5l2 cache controllerRick Chen
Select the v5l2 UCLASS_CACHE driver for ax25. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: ae350: use the v5l2 driver to configure the cacheRick Chen
Find the UCLASS_CACHE driver to configure the cache controller's settings. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03dm: cache: add v5l2 cache controller driverRick Chen
Add a v5l2 cache controller driver that is usually found on Andes RISC-V ae350 platform. It will parse the cache settings from the dtb. In this version tag and data ram control timing can be adjusted by the requirement from the dtb. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03dm: cache: Add enable and disable ops for sandbox and testRick Chen
Add cache enable and disable ops for test coverage. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03dm: cache: Add enable and disable ops for cache uclassRick Chen
Add cache enable/disable ops to the DM cache uclass driver Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: andes_plic: init plic by scanning each cpu nodeRick Chen
Initialize plic driver by ofnode_for_each_subnode() instead of cpu_get_count(). This way can support to skip some harts which maybe marked as unavailable, but the cpu node exists indeed. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: update fix_rela_dynMarcus Comstedt
The addend is now added for RELOC_TYPE relocs. Also, changed the loop structure so that all the R_RISCV_RELATIVE relocs are not required to be at the beginning of the list. Signed-off-by: Marcus Comstedt <marcus@mc.pp.se> Cc: Rick Chen <rick@andestech.com>
2019-09-03riscv: tools: Handle addend to absolute reloc in prelink-riscvMarcus Comstedt
Previously the handling of R_RISCV_32 and R_RISCV_64 would simply insert the value of the symbol and ignore any addend. However, there exist relocs where the addend is non-zero: 0000000080250900 R_RISCV_64 efi_runtime_services+0x0000000000000068 0000000080250910 R_RISCV_64 efi_runtime_services+0x0000000000000038 0000000080250920 R_RISCV_64 efi_runtime_services+0x0000000000000018 0000000080250930 R_RISCV_64 efi_runtime_services+0x0000000000000020 0000000080250980 R_RISCV_64 efi_runtime_services+0x0000000000000048 0000000080250990 R_RISCV_64 efi_runtime_services+0x0000000000000050 00000000802509a0 R_RISCV_64 efi_runtime_services+0x0000000000000058 0000000080250940 R_RISCV_64 systab+0x0000000000000030 0000000080250950 R_RISCV_64 systab+0x0000000000000040 0000000080250960 R_RISCV_64 systab+0x0000000000000050 0000000080250970 R_RISCV_64 systab+0x0000000000000060 In these cases the addend needs to be added to the symbol value to get the correct value for the reloc. Signed-off-by: Marcus Comstedt <marcus@mc.pp.se> Cc: Rick Chen <rick@andestech.com>
2019-09-03sifive-fu540: config: Add mmc0 as a boot target deviceAlistair Francis
Add the mmc0 device as a BOOT_TARGET_DEVICES. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: sifive: fu540: set serial environment variable from otpSagar Shrikant Kadam
This patch sets the serial# environment variable by reading the board serial number from the OTP memory region. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-03riscv: cpu: Skip unavailable hart in the get_count() opBin Meng
We should not count in hart that is marked as not available in the device tree in riscv_cpu_get_count(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-09-02sh: r2dplus: Switch to DM PCI driverMarek Vasut
Add DT entry for the DM PCI driver, update board configs and drop ad-hoc board init code for the PCI bus. Instead, let the DM PCI driver initialize and operate the hardware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02pci: sh7751: Convert to DM and DT probingMarek Vasut
Convert the SH7751 PCI driver to DM and add DT probing. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2019-09-02sh: r2dplus: Enable OF controlMarek Vasut
Enable OF control for SH4 R2Dplus board. This is necessary, because the PCI uclass is designed in a way that makes it depend on DT and disallows instanciating devices without DT (e.g. with platdata). Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02sh: r2dplus: Enable DMMarek Vasut
Enable driver model support for SH4 R2Dplus board. Thus far, no drivers are bound via the DM. The PCI drivers have yet to be converted to DM_PCI. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02sh: Fix OF_SEPARATE supportMarek Vasut
If the OF_SEPARATE is enabled, the DT is appended past the _end symbol. The current code however clears BSS very early, which overwrites the DT blob with zeroes. Moreover, the early code relocates U-Boot into RAM to the correct location, but does not relocate the DT. This patch adds code to relocate the DT and avoids clearing BSS too early, thus addressing both problems with OF_SEPARATE on SH. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02sh: tmu: Fix SH4 TCNT0 offsetMarek Vasut
Fix the offset of TCNT0 register, which is 0xc on SH4. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-02dm: core: Decouple DM from DTMarek Vasut
Some of the DM functions depend on OF_CONTROL, which is incorrect. DM and DT are orthogonal. Add macro guards around such functions to avoid compiling them in when DM is enabled, while OF_CONTROL is not. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org>
2019-09-02i2c: mxc: add CONFIG_CLK supportPeng Fan
When CONFIG_CLK enabled, use CLK UCLASS for clk related settings. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> hs: removed hunk in mxc_i2c_probe() as not longer in code
2019-09-01Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- r8a66597 usb changes
2019-08-31Merge branch '2019-08-30-master-imports'Tom Rini
- Assorted bug fixes
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