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2007-08-06This is a framebuffer driver for ATI video card, can work for PCI9200,Jason Jin
X300, X700, X800 ATI video cards. Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2007-08-06Merge with /home/wd/git/u-boot/custodian/u-boot-testingWolfgang Denk
2007-08-06Coding style cleanup. Update CHANGELOG.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-06Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xxWolfgang Denk
2007-08-06Add functions to list of exported functionsMartin Krause
Additionally export the following fuctions (to make trab_config build again): - simple_strtol() - strcmp() Also bump the ABI version to reflect this change Signed-off-by: Martin Krause <martin.krause@tqs.de>
2007-08-06Make MPC8641's PCI/PCI-E driver a common driver for many FSL parts.Ed Swarthout
All of the PCI/PCI-Express driver and initialization code that was in the MPC8641HPCN port has now been moved into the common drivers/fsl_pci_init.c. In a subsequent patch, this will be utilized by the 85xx ports as well. Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added. Also enable the second PCI-Express controller on 8641 by getting its BATS and CFG_ setup right. Fixed a u16 vendor compiler warning in AHCI driver too. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-08-05[FIX] Coding style cleanupMichal Simek
2007-08-05Merge git://www.denx.de/git/u-bootMichal Simek
2007-08-05[FIX] Xilinx Uartlite driverMichal Simek
Because PPC405 can use UARTLITE serial interface and Microblaze can use Uart16550 serial interface not only Uartlite.
2007-08-05[FIX] Change configuration for XUPV2P Microblaze boardMichal Simek
2007-08-05[PATCH] Added support for Xilinx Emac community driverMichal Simek
2007-08-03cm1_qp1 -> cm5200: single U-Boot image for modules from the cm5200 family.Bartlomiej Sieka
Add the ability for modules from the Schindler cm5200 family to use a single U-Boot image: - rename cm1_qp1 to cm5200 - add run-time module detection - parametrize SDRAM configuration according to the module we are running on Few minor, board-specific fixes included in this patch: - better MAC address handling - updated default environment ('update' command uses +{filesize} now) - improved error messages in the auto-update code - allow booting U-Boot from RAM (CFG_RAMBOOT) Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Piotr Kruszynski <ppk@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2007-08-03Add Marvell 1149 PHY support to the TSECAndy Fleming
2007-08-03Merge branch 'testing' into workingAndy Fleming
Conflicts: CHANGELOG fs/fat/fat.c include/configs/MPC8560ADS.h include/configs/pcs440ep.h net/eth.c
2007-08-02Coding style cleanup, update CHANGELOGWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-08-02Minor cleanup of <board>_nand build rules.Wolfgang Denk
2007-08-02Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-08-02ppc4xx: Code cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-02[ppc440SPe] Graceful recovery from machine check during PCIe configurationGrzegorz Bernacki
During config transactions on the PCIe bus an attempt to scan for a non-existent device can lead to a machine check exception with certain peripheral devices. In order to avoid crashing in such scenarios the instrumented versions of the config cycle read routines are introduced, so the exceptions fixups framework can gracefully recover. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Acked-by: Rafal Jaworowski <raj@semihalf.com>
2007-08-02[ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.ARafal Jaworowski
This brings back separate settings for PCIe bus numbers depending on chip revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa commit. 440SPe rev. A does NOT work properly with the same settings as for the rev. B (no devices are seen on the bus during enumeration). Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-08-02Fix build errors and warnings / code cleanup.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-31ppc4xx: Update AMCC Bamboo 440EP supportEugene OBrien
Changed storage type of cfg_simulate_spd_eeprom to const Changed storage type of gpio_tab to stack storage (Cannot access global data declarations in .bss until afer code relocation) Improved SDRAM tests to catch problems where data is not uniquely addressable (e.g. incorrectly programmed SDRAM row or columns) Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules Fixed AM29LV320DT (OpCode Flash) sector map Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-31ppc4xx: Update 440EPx lwmon5 board supportStefan Roese
- Clear ECC status regs after ECC POST test - Set dcbz for ECC generation with caches enabled as default - Code cleanup Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-30ppc4xx: Only print ECC related info when the error bis are setStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-28new FPGA image for PLU405 boardMatthias Fuchs
new FPGA image for PLU405 board with improved CompactFlash timing Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-07-27[ADS5121] Support for the ADS5121 boardRafal Jaworowski
The following MPC5121e subsystems are supported: - low-level CPU init - NOR Boot Flash (common CFI driver) - DDR SDRAM - FEC - I2C - Watchdog Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Jan Wrobel <wrr@semihalf.com>
2007-07-27[PPC] Remove unused MSR_USER definitionRafal Jaworowski
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-07-26ppc4xx: Add support for AMCC 405EP Taihu boardJohn Otken
Signed-off-by: John Otken <john@softadvances.com>
2007-07-26ppc4xx: lwmon5: Update Lime initializationAnatolij Gustschin
Change Lime SDRAM initialization to now support 100MHz and 133MHz (if enabled). Also the framebuffer is initialized to display a blue rectangle with a white border. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-24ppc4xx: lwmon5: Support for 128 MByte NOR FLASH addedStefan Roese
The used Intel NOR FLASH chips have internally two dies, and are now treated as two seperate chips. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-24ppc4xx: Fix lwmon5 interrupt controller setup (polarity, trigger...)Stefan Roese
As suggested by Hakan Eryigit, here an updated setup for the lwmon5 interrupt controller. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-20ppc4xx: Fix bug with default GPIO output valueStefan Roese
As spotted by Matthias Fuchs, the default output values for all GPIO1 outputs were not setup correctly. This patch fixes this issue. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-20POST: Add ECC POST for the lwmon5 boardPavel Kolesnikov
This patch adds ECC Post test for the Lwmon5 board based on PPC440EPx to U-Boot. Signed-off-by: Pavel Kolesnikov <concord@emcraft.com> Acked-by: Yuri Tikhonov <yur@emcraft.com> Acked-by: Stefan Roese <sr@denx.de>
2007-07-20Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-07-19Fix breakage of 8xx boards from recent commit.Rafal Jaworowski
This patch fixes the negative consequences for 8xx of the recent "ppc4xx: Clean up 440 exceptions handling" commit. Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-07-16Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-07-16Coding style cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16Merge with /home/stefan/git/u-boot/u-boot-coldfire-freescaleStefan Roese
2007-07-16ppc4xx: Code cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16ppc4xx: Support for Yucca board with 440SPe Rev A added to 44x_spd_ddr2.cStefan Roese
The new boardspecific DDR2 controller configuration is used for the Yucca board. Now the Yucca board with 440SPe Rev. A chips is also supported. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16ppc4xx: Add new weak functions to support boardspecific DDR2 configurationStefan Roese
The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better support non default, boardspecific DDR(2) controller configuration. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16ppc4xx: Add remove_tlb() function to remove a mem area from TLB setupStefan Roese
The new function remove_tlb() can be used to remove the TLB's used to map a specific memory region. This is especially useful for the DDR(2) setup routines which configure the SDRAM area temporarily as a cached area (for speedup on auto-calibration and ECC generation) and later need this area uncached for normal usage. Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16[PATCH] Support for Xilinx EmacLite controllerMichal Simek
2007-07-14Update CHANGELOGWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-07-14[FIX] support for simply measuring timeMichal Simek
2007-07-14[FS] Added support for ROMFSMichal Simek
2007-07-14Merge with /home/hs/Atronic/u-boot-dev-newHeiko Schocher
2007-07-14[PCS440EP] - fix compile error, if BUILD_DIR is usedHeiko Schocher
2007-07-14[PATCH] Support time without timerMichal Simek
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