summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2020-05-01clk: imx: clk-imxrt1050: fix lcdif clock gateGiulio Benetti
LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01video: mxsfb: add clk_enable()Giulio Benetti
BROM doesn't enable lcdif by default so add clk_enable() after clk_set_rate(). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01imxrt1020-evk: README: change dd command destinationGiulio Benetti
Set dd "of=" to "of=/dev/sdX" to be generic and prevent host hard drive damage. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-05-01imxrt1050-evk: README: change dd command destinationGiulio Benetti
Set dd "of=" to "of=/dev/sdX" to be generic and prevent host hard drive damage. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-05-01imx: spl: Fix use of removed SPL_FAT_SUPPORT configHarald Seiler
CONFIG_SPL_FAT_SUPPORT was removed in commit 0c3a9ed409a5 ("spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT"). Fixup a leftover use of the symbol. Fixes: 9d86dbd9cf9d ("imx: spl: implement spl_boot_mode for i.MX7/8/8M") Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01imx: spl: Remove ifdefs in spl_mmc_boot_mode()Harald Seiler
It is hard to read code which contains nested ifdef blocks. Replace them with normal if-blocks and the IS_ENABLED() macro. This is not only more readable but also helps as both arms are validated by the compiler in all cases. Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01Revert "imx: defconfig: Enable CONFIG_SPL_FORCE_MMC_BOOT"Harald Seiler
CONFIG_SPL_FORCE_MMC_BOOT was removed in a previous patch as its behavior is the correct one in all cases. Remove all uses of it from defconfigs. This reverts commit 3201e5b444ae3a13aa31e8b5101ad38d7ff0640d and removes CONFIG_SPL_FORCE_MMC_BOOT from the imx28_xea defconfig. Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01Revert "imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon ↵Harald Seiler
mode" The CONFIG_SPL_FORCE_MMC_BOOT config flag is not needed as its behavior is the correct one in all cases; using spl_boot_device() instead of the boot_device parameter will lead to inconsistency issues, for example, when a board_boot_order() is defined. In fact, this is the reason the parameter was introduced in the first place, in commit 2b1cdafa9fdd ("common: Pass the boot device into spl_boot_mode()"). This reverts commit 772b55723bcbe8ebe84f579d9cdc831d8e18579d. Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01imx: spl: return boot mode for asked MMC device in spl_mmc_boot_mode()Anatolij Gustschin
Boards may extend or re-define the boot list in their board_boot_order() function by modifying spl_boot_list. E.g. a board might boot SPL from a slow SPI NOR flash and then load the U-Boot from an eMMC or SD-card. Or it might use additional MMC boot device in spl_boot_list for cases when the image in SPI NOR flash is not found, so it could fall back to eMMC, SD-card or another boot device. Getting the MMC boot mode in spl_mmc will fail when we are trying to boot from an MMC device in the spl_boot_list and the original board boot mode (as returned by spl_boot_device()) is not an MMC boot mode. Fix it by checking the asked MMC boot device from the spl_mmc_boot_mode() argument. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-05-01arm: imx: Add support for Google's Coral Dev BoardAlifer Moraes
Add initial support for Google's Coral Dev Board based on i.MX8MQ. https://coral.ai/products/dev-board The Phanbell naming has been used here to match the naming convention used in Google's U-Boot source tree: https://coral.googlesource.com/uboot-imx/ Co-developed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com> Tested-by: Marco Franchi <marcofrk@gmail.com>
2020-05-01ARM: imx8m: Fix reset in SPL on Toradex iMX8MM VerdinMarek Vasut
Board files should not re-implement do_reset() to work around this function not being defined in for specific configurations. Rather, the fix is to compile in drivers which implement this properly. This patch enables sysreset and watchdog drivers in SPL and ties them together to implement the same as the do_reset() hack in the board file, except correctly in the DM/DT framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-05-01ARM: imx8m: Fix reset in SPL on NXP iMX8MP EVKMarek Vasut
Board files should not re-implement do_reset() to work around this function not being defined in for specific configurations. Rather, the fix is to compile in drivers which implement this properly. This patch enables sysreset and watchdog drivers in SPL and ties them together to implement the same as the do_reset() hack in the board file, except correctly in the DM/DT framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-05-01ARM: imx8m: Fix reset in SPL on NXP iMX8MN EVKMarek Vasut
Board files should not re-implement do_reset() to work around this function not being defined in for specific configurations. Rather, the fix is to compile in drivers which implement this properly. This patch enables sysreset and watchdog drivers in SPL and ties them together to implement the same as the do_reset() hack in the board file, except correctly in the DM/DT framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-05-01ARM: imx8m: Fix reset in SPL on NXP iMX8MM EVKMarek Vasut
Board files should not re-implement do_reset() to work around this function not being defined in for specific configurations. Rather, the fix is to compile in drivers which implement this properly. This patch enables sysreset and watchdog drivers in SPL and ties them together to implement the same as the do_reset() hack in the board file, except correctly in the DM/DT framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-05-01ARM: imx8m: Don't use the addr parameter of reset_cpu()Claudius Heine
imx8m has the only implementation of reset_cpu() which does not ignore the addr parameter and instead gives it some meaning as the base address of watchdog registers. This breaks convention with the rest of U-Boot where the parameter is ignored and callers are passing in 0. Fixes: d2041725e84b ("imx8m: restrict reset_cpu") Co-developed-by: Harald Seiler <hws@denx.de> Signed-off-by: Harald Seiler <hws@denx.de> Signed-off-by: Claudius Heine <ch@denx.de>
2020-05-01ARM: imx8m: Fix indentation of reset_cpu() functionHarald Seiler
Use proper code-style, tabs instead of spaces for indentation. Signed-off-by: Harald Seiler <hws@denx.de>
2020-05-01ARM: imx8m: Do not define do_reset() if sysreset is enabledMarek Vasut
The SPL can also be compiled with sysreset drivers just fine, so update the condition to cater for that option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-05-01dt-bindings: pinctrl: imxrt1020: remove useless commentGiulio Benetti
A comment note has been left after completing pinctrl listing, so let's remove it since it's useless. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-05-01ARM: imx: imx8m: Do not warn about cpu-idle-states if missingMarek Vasut
If the cpu-idle-states is missing from the DT in the first place, do not fail on removing in. Just move on and do not even print an error, since not being able to remove something which is not there in the first place is not an error and surely does not justify failing to boot. Turn the surrounding prints into debugs to reduce the useless noise. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Frieder Schrempf <frieder.schrempf@kontron.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-05-01arm: dts: imx8mm: sync dts from Linux Kernel 5.6.7Adam Ford
This patch synchronizes the device tree with that from 5.6.7. This also adds nodes for crypto and ddrc, which makes keeping the device tree files from individual boards in sync with the Linux kernel. This is helpful when boads reference those nodes. Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-01treewide: Remove unused FSL QSPI config options for IMX platformsKuldeep Singh
Some of these options are not used by the driver anymore and some of them are obsolete as the information is gathered from the dt. So, remove the unused config options now. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-05-01imx8qxp_mek: Run with caches enabledFabio Estevam
There is no need to run with caches disabled. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8qxp_mek: Remove SPL watchdog optionFabio Estevam
Currently the following watchdog error is seen in SPL: U-Boot SPL 2020.04-00407-g8d5d3bcf3c (Apr 20 2020 - 09:48:09 -0300) Normal Boot WDT: Not found! ... There is no watchdog driver for i.MX8 at the moment, nor code for configuring the watchdog in SPL, so remove the CONFIG_SPL_WATCHDOG_SUPPORT option for now. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-05-01imx8: Run SPL with caches enabledFabio Estevam
It is safe to run SPL with caches enabled on i.MX8, so remove such restriction. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com> Acked-by: Oliver Graute <oliver.graute@kococonnector.com> Acked-by: Anatolij Gustschin <agust@denx.de> Tested-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-05-01config: apalis-imx8: Enable FEC TXC delayPhilippe Schenker
define FEC_ENET_ENABLE_TXC_DELAY to enable the delay on TXC line on the MAC. This has to be done in order to meet RGMII specs. According to RGMII specs the clock should get delayed so the edges of the clock are preferrably in the middle of the edges of data-lines so they can be sampled properly. Our PHY expects the MAC to delay TXC line, as it is also written in the spec. This patch makes sure the TXC delay on the FEC is enabled Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-05-01net: fec: Add possibility to enable TXC delayPhilippe Schenker
This patch enables the possibility to set FEC_ENET_ENABLE_TXC_DELAY or FEC_ENET_ENABLE_RXC_DELAY so one can via a define enable the RXC or TXC delay in the MAC. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-05-01board: apalis_imx6: Add KSZ9131 phy skew settingsPhilippe Schenker
This patch adds skew register settings for KSZ9131. It checks first which phy is on the board and then applies the correct skew settings. Skew settings calculation for the KSZ9131: The i.MX6 SoC has an output skew tolerance of -100ps to 900ps. All PCB traces where routed exactly the same length so we can calculate the skew settings without taking the length into consideration. The traces are all length matched. RXC skew (PHY to MAC): - We use the 2ns DLL controlled delay on the PHY - We do not use the skew registers This results in the following values: RXC PHY fixed Delay 2000ps PHY Added Delay 0ps T_setup_R min 2.00ns T_setup_R typ 2.00ns T_setup_R max 2.00ns T_hold_R min 1.60ns T_hold_R typ 2.00ns T_hold_R max 2.40ns That means we are well within RGMII specs. TXC skew (MAC to PHY): - We use the 2ns DLL controlled delay on the PHY - We then subtract ~0.6ns with TXD[0:3] and TXC clock pad skew register in a resulting ~1.4ns delay. This results in the following values under consideration of the tolerances: TXC min TXC typ TXC max MAC min -100ps -100ps -100ps MAC max 900ps 900ps 900ps PHY fixed Delay 2000ps 2000ps 2000ps PHY added Delay -340ps -600ps -859ps T_setup_T min 1.56ns 1.30ns 1.04ns T_setup_T typ 2.06ns 1.80ns 1.54ns T_setup_T max 2.56ns 2.30ns 2.04ns T_hold_T min 1.04ns 1.30ns 1.56ns T_hold_T typ 1.94ns 2.20ns 2.46ns T_hold_T max 2.84ns 3.10ns 3.36ns This shows that T_hold_T min and T_setup_T min times are out of spec for RGMII timing. However the KSZ9131 has a minimal value for this time of 0.8ns which is met under all circumstances. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01board: verdin-imx8mm: Add KSZ9131 phy skew settingsPhilippe Schenker
This patch determines which phy is placed on the board with the PHY ID then it sets the same settings for KSZ9031 as before but for KSZ9131 it enables both RXC and TXC delay lines in the PHY. This will compensate the missing delay from the MAC. Other skew settings are not needed as the traces on board are routed exactly the same length Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Tested-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-05-01verdin-imx8mm: Change board phy skew values for our ksz9031Philippe Schenker
This patches uses the existing functions for interacting with the KSZ9031 and uses the values appropriate for our board. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Tested-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-05-01net: phy: micrel: Add basic support for KSZ9131Philippe Schenker
This adds basic support for the new Micrel KSZ9131 phy. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01net: phy: micrel: Use defines for PHY_IDs and MASKPhilippe Schenker
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
2020-05-01mx8mq_evk: Remove unrelated commentFabio Estevam
The comment does not relate to the setup_i2c() function, so just remove it. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-05-01imx8mp_evk: Remove unrelated commentFabio Estevam
The comment does not relate to the setup_i2c() function, so just remove it. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-05-01imx: imx8m: Don't use the addr parameter of reset_cpuClaudius Heine
imx8m has the only implementation of `reset_cpu` which does not ignore the addr parameter and instead gives it some meaning as the base address of watchdog registers. This breaks convention with the rest of U-Boot where the parameter is ignored and callers are passing in 0. Fixes: d2041725e84b ("imx8m: restrict reset_cpu") Co-Authored-by: Harald Seiler <hws@denx.de> Signed-off-by: Claudius Heine <ch@denx.de> Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-01imx: imx8m*: Remove do_reset from board filesClaudius Heine
Use the `do_reset` implementation of `arch/arm/lib/reset.c` in SPL instead. It is very close to what is done here, anyway, and plays more nicely with the rest of U-Boot than adding a custom `do_reset` implementation into board files. `do_reset` from `arch/arm/lib/reset.c` calls `reset_cpu` with 0 as the addr parameter while the boards are passing WDOG1_BASE_ADDR. This is ok because the `reset_cpu` implementation uses WDOG1_BASE_ADDR by default if 0 is passed in. Co-Authored-by: Harald Seiler <hws@denx.de> Signed-off-by: Claudius Heine <ch@denx.de> Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-01ARM: reset: use do_reset in SPL/TPL if SYSRESET was not enabled for themClaudius Heine
In case CONFIG_SYSRESET is set, do_reset from reset.c will not be available anywere, even if SYSRESET is disabled for SPL/TPL. 'do_reset' is called from SPL for instance from the panic handler and PANIC_HANG is not set Signed-off-by: Claudius Heine <ch@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2020-05-01imx8: Configure SNVSFranck LENORMAND
Add a module to configure the tamper and secure violation of the SNVS using the SCU API. The module also adds some commands: - snvs_cfg: Configure the SNVS HP and LP registers - snvs_dgo_cfg: Configure the SNVS DGO bloc if present (8QXP) - tamper_pin_cfg: Change the configuration of the tamper pins - snvs_clear_status: Allow to write to LPSR and LPTDSR to clear status bits Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8: Update SCFW API to version 1.5Ye Li
Sync the latest SCFW API with below commit 6dcd0242ae7a53ac ("SCF-105: Revert accidental change") to add interfaces for PM resource reset and read/write SNVS security violation and tamper DGO registers. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8: scu api: Add support for SECO manufacturing protection APIsBreno Lima
SECO provides APIs to support CAAM manufacturing protection: - sc_seco_get_mp_key() - sc_seco_get_mp_sign() - sc_seco_update_mpmr() Add SCFW APIs support. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01doc: ahab: Add encrypted boot documentation for i.MX8/8x devicesBreno Lima
Add AHAB encrypted boot documentation for i.MX8/8x family devices covering the following topics: - How to encrypt and sign the 2nd container in flash.bin image. - How to encrypt and sign a standalone container image. Include a CSF example to encrypt 2nd container in flash.bin image. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Catia Han <yaqian.han@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8m: Enable WDOG_B for timeoutYe Li
When doing reset_cpu, in normal case the WDOG_B outputs immediately after we clean WDA bit. But on mscale, the WDOG_B may be later than internal reset, and cause PMIC not reset. As we enabled the SD3.0 support, the PMIC must be reset to reset SD card. Change the reset_cpu to enable the WDOG_B for timeout as well, and set WDOG timeout to 1s. Reviewed-by: Fabio Estevam <festevam@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8mm: clock: fix fracpll decode issueYe Li
The fracpll decoding is using the bit definitions for int pll. Most of them are same, but the CLKE bit is different. Fix the wrong CLKE_MASK for fracpll and correct all bit definitions in fracpll decoding. Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8: parser: fix some bad debug message formatingPeng Fan
In SPL build, the formatting '%llx' in debug() is not supported. Also, fix some misplaced parameters in printf. Modified from Seb Fagard's downstream patch Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8: ahab: fix some bad debug message formatingSeb Fagard
In SPL build, the formatting '%llx' in debug() is not supported. Also, fix some misplaced parameters in printf. Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8: ahab: fix 'end address' parameter of rm_find_memregPeng Fan
parameter 'end address' must be inclusive of address range. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8: Change to use new SECO API commandsYe Li
Latest SCFW has removed old MISC SECO commands. So update the codes to use new SECO commands. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8: parser: fix 'end address' parameter of rm_find_memregPeng Fan
parameter 'end address' must be inclusive of address range. Modified from Seb's downstream patch. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8m: Dump DRAM PLL rate by clocks commandYe Li
Add the dump of DRAM PLL into "clocks" command Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2020-05-01imx8mq: Set ARM core clock directly from ARM PLLPeng Fan
For ARM core clock, there are two input branches, and can select via mux: one from ARM PLL directly, second from CCM A53 clock root. Currently we are using second branch. But IC confirmed the CCM A53 root signoff timing is 1Ghz, so we should switch to input from ARM PLL directly. This patch fixes the CORE SEL slice configuration and switch ARM clock to ARM PLL. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01imx8mq: Enable eMMC HS400 and SD UHS mode on EVKYe Li
iMX8MQ EVK board has a eMMC5.0 chip and supports SD3.0, so enable the UHS and HS400 configs to enhance the eMMC/SD access. The change also needs to set usdhc clock to 400Mhz, and add the off-on-delay-us to SD reset pin, otherwise some SD cards will fail to select UHS mode in re-initialization. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2025-01-13 21:33:02 +0000