summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2017-08-15sun50i: a64: Add initial NanoPi A64 supportJagan Teki
NanoPi A64 is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner A64 SOC. Nanopi A64 features - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS - 1GB DDR3 RAM - MicroSD - Gigabit Ethernet (RTL8211E) - Wi-Fi 802.11b/g/n - IR receiver - Audio In/Out - Video In/Out - Serial Debug Port - microUSB 5V 2A DC power-supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-11sun50i: a64: Sync Linux [oe]hci0 nodesJagan Teki
Synced ohci0 and ehci0 nodes from Linux for sun50i-a64.dtsi Here is the Linux last merge tag details: Merge: 0e91f43d e5770b7 Author: Stephen Rothwell <sfr@canb.auug.org.au> Date: Fri Jun 9 14:59:55 2017 +1000 Merge remote-tracking branch 'staging/staging-next' Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-11sunxi: add MACPWR in Orange Pi PC2 defconfigIcenowy Zheng
The Ethernet function is enabled in the Orange Pi PC2 device tree and defconfig, however, CONFIG_MACPWR is not properly set, which left the PHY being disabled when booting, which makes the Ethernet function not usable. Add the proper value of this option in the PC2 defconfig. Fixes: e7bd15ea156f ("sunxi: Add OrangePi PC 2 initial support") Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-11sunxi: switch PRCM to non-secure on H3/H5 SoCsIcenowy Zheng
The PRCM of H3/H5 SoCs have a secure/non-secure switch, which controls the access to some clock/power related registers in PRCM. Current Linux kernel will access the CPUS (AR100) clock in the PRCM block, so the PRCM should be switched to non-secure. Add code to switch the PRCM to non-secure. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-11sunxi: add PRCM secure switch register definitionIcenowy Zheng
Some new Allwinner SoCs' PRCM has a secure switch register, which controls the access to some clock and power registers in PRCM block. Add the definition of this register and its bits in the PRCM header file. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Tested-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-11sunxi: reduce Orange Pi Zero DRAM clock speedClément Bœsch
Using `fel-boot-lima-memtester-on-orange-pi-pc 672` on an Orange Pi without heatsink results in the following error after a few minutes: WRITE FAILURE: 0x00200000 != 0xffdfffff at offset 0x0137f47c (bitflip). Also, the constructor repository (github/orangepi-xunlong) seems to contain that 624 Mhz clock speed in its u-boot fork. It may be that 672 Mhz is the advertized overclocked speed. According to http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit it may be worth decreasing that value with other Orange Pi boards. See also e7d6aa0b74b7f4d08ee68da8a586c76c761348e2. Signed-off-by: Clément Bœsch <u@pkh.me> [Add s-o-b line] Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-11sun7i: Add support for Olimex A20-OLinuXino-LIME2-eMMCOlliver Schinagl
This patch adds support for the Olimex OLinuXino Lime2 with eMMC flash storage. https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME2-eMMC/ It is a assembly variant of the regular Lime2 but featuring eMMC for storage. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-11ARM: dts: sunxi: Change node name for pwrseq pin on Olinuxino-lime2-emmcEmmanuel Vadot
The node name for the power seq pin is mmc2@0 like the mmc2_pins_a one. This makes the original node (mmc2_pins_a) scrapped out of the dtb and result in a unusable eMMC if U-Boot didn't configured the pins to the correct functions. Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-10Merge git://git.denx.de/u-boot-i2cTom Rini
2017-08-10Merge git://www.denx.de/git/u-boot-marvellTom Rini
2017-08-10i2c: designware: Allow sending restart conditionsMarek Vasut
Allow sending restart conditions upon direction change as this is required by some chips. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denxx.de>
2017-08-10Convert CONFIG_SYS_I2C_OMAP24XX to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_SYS_I2C_OMAP24XX Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-10net: mvpp2x: Set BM poll size once during priv probeStefan Chulski
Set BM poll size once during priv probe and do not overwrite it during port probe procedure. Pool is common for all CP ports. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: remove TX drain from transmit routineStefan Chulski
TX drain in transmit procedure could cause issues due to race between drain procedure and transmition of descriptor between AGGR TXQ and physical TXQ. TXQ will be cleared before moving to Linux by stop procedure. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: Set BM pool high addressStefan Chulski
MVPP22 driver support 64 Bit arch and require BM pool high address configuration. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: Remove IRQ configuration from U-BootStefan Chulski
Remove IRQ configuration from U-Boot PP driver. U-Boot don't use interrupts and configuration of IRQ in U-Boot caused crashes in Linux shared interrupt mode. Also interrupt use is redundant in RX routine since a single RX queue is used. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: remove MBUS configurations from MvPP22 driverStefan Chulski
MBUS driver were replaced by AXI in PPv22 and relevant only for PPv21. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: decrease size of AGGR_TXQ and CPU_DESC_CHUNKStefan Chulski
U-boot use single physical tx queue with size 16 descriptors. So aggregated tx queue size should be equal to physical tx queue and cpu descriptor chunk(number of descriptors delivered from physical tx queue to aggregated tx queue by one chunk) shouldn't be larger than physical tx queue. Fix: Set AGGR_TXQ and CPU_DESC_CHUNK to be 16 descriptors, same as physical TXQ. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: fix BM configuration overrun issueStefan Chulski
Issue: BM counters were overrun by probe that called per Network interface and caused release of wrong number of buffers during remove procedure. Fix: Use probe_done and num_ports to call init and remove procedure once per communication controller. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: Enable GoP packet padding in TXStefan Chulski
This patch enables padding of packets shorter than 64B in TX(set by default). Disabling of padding causes crashes on MACCIATO board. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: fix phy connected to wrong mdio issueStefan Chulski
A8K marvell SoC has two South Bridge communication controllers(CP0 and CP1). Each communication controller has packet processor ports and MDIO. On MACHIATOBin board ports from CP1 are connected to mdio on CP0. Issue: Wrong base address is assigned to MDIO interface during probe. Fix: Get MDIO address from PHY handler parent base address. This should be refined in the future when MDIO driver is implemented. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10net: mvpp2x: Add GPIO configuration supportStefan Chulski
This patch add GPIO configuration support in mvpp2x driver. Driver will handle 10G SFP gpio reset and SFP TX disable. GPIO pins should be set in device tree. Signed-off-by: Stefan Chulski <stefanc@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-09Configs: Migrate CONFIG_SYS_I2C_OMAP34XX to CONFIG_SYS_I2C_OMAP24XXAdam Ford
The driver is for all boards 24XX and up, so let's eliminate the extra option called CONFIG_SYS_I2C_OMAP34XX since the driver checks for CONFIG_OMAP34XX we don't need CONFIG_SYS_I2C_OMAP34XX. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-09i2c: at91: Add missing probe function to device driverWenyou.Yang@microchip.com
Add missing probe function to the device driver to active a device. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-08Merge git://git.denx.de/u-boot-x86Tom Rini
2017-08-08Merge git://www.denx.de/git/u-boot-cfi-flashTom Rini
2017-08-08Merge git://www.denx.de/git/u-boot-marvellTom Rini
2017-08-08configs: Finish migration of PHY_GIGETom Rini
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-08x86: Add defconfig for theadorable-x86-conga with PCIe x4 blobsStefan Roese
This defconfig uses the PCIe x4 binary blobs from the congatec BIOS. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08x86: conga: theadorable-x86-conga-qa3-e3845_defconfig: Misc defconfig updatesStefan Roese
- Disable debug UART - Enable more partition support Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08x86: conga: conga-qeval20-qa3-e3845_defconfig: Misc defconfig updatesStefan Roese
- Enable ACPI resume support - Disable debug UART - Enable Spansion and Winbond SPI flash support - Move VGA BIOS binary address to enable bigger U-Boot images Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08x86: theadorable-x86: Add header file for common defines and envStefan Roese
This patch adds the common header include file theadorable-x86-common.h for the theadorable-x86 targets to define all common options and the default environment. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08x86: conga: Add option to select different config headers for baseboardsStefan Roese
This patch adds the infrastructure to define different config headers with different configurations and default environment for the baseboards that can now be selected via Kconfig. The new configuration for the theadorable-x86-conga-qa3-e3845 is also added. Also the new defconfig file for this new target is added. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08x86: dfi: Add option to select different config headers for baseboardsStefan Roese
This patch adds the infrastructure to define different config headers with different configurations and default environment for the baseboards that can now be selected via Kconfig. The new configuration for the theadorable-x86-dfi-bt700 is also added. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08x86: acpi: Fix build error with certain configurationBin Meng
When CONFIG_EFI_PARTITION is not set, the following build error is seen in arch/x86/lib/acpi_s3.c: error: expected declaration specifiers or '...' before '*' token static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void*)WAKEUP_BASE; This is actually caused by missing asmlinkage declaration, but with CONFIG_EFI_PARTITION on, the declaration comes from part.h which is included from common.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-08mtd: cfi: Zap CFI_FLASH_SHIFT_WIDTH redefinitionMarek Vasut
This is defined twice in the same file, with the same value, likely because of some patch merge issue. Pick the uglier one and nuke it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-08mvebu: turris_omnia: Fix PEX vs SATA detection for board topologyMarek Behún
The I2C reading in the PEX vs SATA detection code often fails on the first try. Try three times, as the code for EEPROM reading does. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-08x86: Remove dead ISA related codesBin Meng
Neither new design uses ISA bus, nor does any U-Boot codes use these codes. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-07Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2017-08-07Move PHY_MICREL and PHY_MICREL_KSZ90X1 to KconfigAlexandru Gagniuc
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07Move PHYLIB to KconfigAlexandru Gagniuc
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: phy: micrel: add an option to disable gigabit for the KSZ9031Sebastien Bourdelin
The environment variable "disable_giga" can now be used to disable 1000baseTx on the Micrel's KSZ9031. Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: Use packed structures for networkingDenis Pynkin
PXE boot is broken with GCC 7.1 due option '-fstore-merging' enabled by default for '-O2': BOOTP broadcast 1 data abort pc : [<8ff8bb30>] lr : [<00004f1f>] reloc pc : [<17832b30>] lr : [<878abf1f>] sp : 8f558bc0 ip : 00000000 fp : 8ffef5a4 r10: 8ffed248 r9 : 8f558ee0 r8 : 8ffef594 r7 : 0000000e r6 : 8ffed700 r5 : 00000000 r4 : 8ffed74e r3 : 00060101 r2 : 8ffed230 r1 : 8ffed706 r0 : 00000ddd Flags: nzcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... Core reason is usage of structures for network headers without packed attribute. Reviewed-by: Yauheni Kaliuta <yauheni.kaliuta@redhat.com> Signed-off-by: Denis Pynkin <denis.pynkin@collabora.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: Fix compile failure in net.cHolger Dengler
Add missing "defined" statement to fix the compile failures. Signed-off-by: Holger Dengler <dengler@linutronix.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: phy: Add AFE settings to the Broadcom Cygnus phyArun Parameswaran
Added the AFE (Analog Front End) settings for stability to the Broadcom Cygnus phy. This improves the time take to perform auto negotiation. Signed-off-by: Arun Parameswaran <arun.parameswaran@broadcom.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: move Broadcom SF2 driver to KconfigSuji Velupillai
move to Kconfig: CONFIG_BCM_SF2_ETH CONFIG_BCM_SF2_ETH_DEFAULT_PORT CONFIG_BCM_SF2_ETH_GMAC Also modified defconfigs of all platforms that use these configs. Signed-off-by: Suji Velupillai <suji.velupillai@broadcom.com> Tested-by: Suji Velupillai <suji.velupillai@broadcom.com> Reviewed-by: JD Zheng <jiandong.zheng@broadcom.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Steve Rae <steve.rae@raedomain.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: phy: Hide Micrel KSZ9021 and KSZ9031 Kconfig optionsAlexandru Gagniuc
The correct option is PHY_MICREL_KSZ90X1, but some configs still select the 9021 and 9031 options, which are deprecated. Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: phy: micrel: Remove ksz90x1 drivers from micrel_ksz8xxxAlexandru Gagniuc
There should be no longer be any ksz9000 users that pick up the PHY driver from ksz8xxx, so remove ksz9000 remnants from there. Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07configs: Replace deprecated Micrel defines with PHY_MICREL_KSZ90X1Alexandru Gagniuc
These boards will now use the ksz90x1 driver instead of the mess in ksz8xxx. This change is needed before the two drivers can be fully separated. Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 driversAlexandru Gagniuc
The KS8721BL and KSZ9021 PHYs are software-incompatible, yet they share the same ID. Drivers for bothe PHYs cannot safely coexist, so the solution was to use #ifdefs to select between the two drivers. As a result KSZ9031, which has a unique ID, is now caught in the crossfire. Unless CONFIG_PHY_MICREL_KSZ9031 is defined, the KSZ9031 will not function properly, as some essential configuration code is ifdef'd-out. To prevent such situations, move the KSZ9000 drivers to a separate file, and place them under a separate Kconfig option. While it is possible to enable both KSZ8000 and KSZ9000 drivers at the same time, the assumption is that it is highly unlikely for a system to contain both a KSZ8000 and a KSZ9000 PHY, and that only one of the drivers will be enabled at any given time. Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit (git 2.34.1) at 2025-01-25 03:53:34 +0000