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2019-02-09defconfigs: dra7xx_hs_evm: Sync HS and non-HS defconfigsAndrew F. Davis
Additions have been made to the non-HS defconfig without the same being made to the HS defconfig, sync them. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-02-09bcm968580: enable watchdog and reboot with watchdogPhilippe Reynes
Enable watchdog and reboot with watchdog in the configuration. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-09bcm968380gerg: enable watchdog and reboot with watchdogPhilippe Reynes
Enable watchdog and reboot with watchdog in the configuration. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-09dt: bcm6858: add watchdogPhilippe Reynes
This commit add watchdog and sysreset watchdog in the bcm6858 device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-09dt: bcm6838: add watchdogPhilippe Reynes
This commit add watchdog and sysreset watchdog in the bcm6838 device tree. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-09watchdog: bcm6345: allow to use this driver on arm bcm6858Philippe Reynes
This IP is also used on some arm SoC, so we allow to use it on arm bcm6858 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-02-09watchdog: bcm6345: switch to raw I/O functionsPhilippe Reynes
This driver is used on several big endian mips board. So we could use raw I/O function instead of forcing big endian access. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-02-09fs: ext4: Unmount FS in do_fs_type()Marek Vasut
Unlike other generic FS accessors, fs_get_info() does not call fs_close() at the end of it's operation. Thus, using fs_get_info() in do_fs_type() without calling fs_close() causes potential memory leak by creating new filesystem structures on each call of do_fs_type(). The test case to trigger this problem is as follows. It is required to have ext4 filesystem on the first partition of the SDMMC device, since ext4 requires stateful mount and causes memory allocation. => while true ; do mmc rescan ; fstype mmc 1 ; done Eventually, the mounting of ext4 will fail due to malloc failures and the filesystem will not be correctly detected. This patch fixes the problem by adding the missing fs_close(). Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
2019-02-09mmc: Do not poll using CMD13 when changing timingMarek Vasut
When using CMD6 to switch eMMC card timing from HS200/HS400 to HS/legacy, do not poll for the completion status using CMD13, but rather wait 50mS. Once the card receives the CMD6 and starts executing it, the bus is in undefined state until both the card finishes executing the command and until the controller switches the bus to matching timing configuration. During this time, it is not possible to transport any commands or data across the bus, which includes the CMD13. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2019-02-09mmc: tmio: renesas: Add 1uS delay after DMA completion on older IPsMarek Vasut
The internal DMAC asserts DMA transfer end bit too early on older version of the TMIO IPs which use bit 17 for DTRAEND. Add 1uS delay after the completion of DMA transfer and before invalidating the cache to let the DMAC fully complete the transfer. Otherwise, it could happen that the last few bytes of a transferred data are not available. A test case to trigger this behavior is the following command, ran on the U-Boot command line, with Sandisk 16 GiB UHS-I card inserted into SDHI slot 0 and with first partition being of type FAT: => while true ; do mmc rescan ; fstype mmc 0:1 ; done Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-09mmc: tmio: Make DMA transfer end bit configurableMarek Vasut
Different versions of the SDHI core use either bit 17 or bit 20 for the DTRAEND indication, which can differ even between SoC revisions. Make the DTRAEND bit position part of the driver private data, so that the probe function can set this accordingly. Set this to 20 on Socionext SoCs and either 17 or 20 on Renesas SoCs, depending on the SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-02-08fdt: support booting with dtb in Android imageShawn Guo
Some platforms choose to store device tree blob in Android image second area. Let's try to look for dtb from there when booting an Android image, and use it for booting if found. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2019-02-08dm: core: Add tests for dev_read_alias_highest_id()Michal Simek
It is checking the highest alias ID for eth, gpio, pci, i2c and error code on non existing alias. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-08dm: core: Introduce dev_read_alias_highest_id()Michal Simek
It is wrapper for calling of_alias_get_highest_id() when live tree is enabled and fdtdec_get_alias_highest_id() if not. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-08fdt: Introduce fdtdec_get_alias_highest_id()Michal Simek
Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-08dm: core: Add of_alias_get_highest_id()Michal Simek
The same functionality was added to Linux for i2c bus registration with this commit message: " of: base: add function to get highest id of an alias stem I2C supports adding adapters using either a dynamic or fixed id. The latter is provided by aliases in the DT case. To prevent id collisions of those two types, install this function which gives us the highest fixed id, so we can then let the dynamically created ones come after this highest number. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> " Add it also to U-Boot for DM I2C support. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-07Prepare v2019.04-rc1Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-02-07configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-02-07Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
- SPI-NOR support
2019-02-07MAINTAINERS: Add an entry for SPI NORVignesh R
Add myself as co-maintainer for U-Boot SPI NOR subsystem. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: drop mtd/spi file from SPI entry] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-02-07configs: Don't use SPI_FLASH_BAR as defaultVignesh R
Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07configs: Remove SF_DUAL_FLASHVignesh R
SF_DUAL_FLASH claims to enable support for SF_DUAL_STACKED_FLASH and SF_DUAL_PARALLEL_FLASH. But, in current U-Boot code, grepping for above enums yield no user and therefore support seems to be incomplete. Remove these configs so as to avoid confusion. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07spl: Kconfig: Enable SPI_FLASH_TINY by default for SPLVignesh R
SPL only needs to be able to read from SPI Flash to load next stage and does not really need write/erase etc. Therefore in order to reduce SPI Flash code size in SPL, enable SPI_FLASH_TINY, that only supports reading from SPI flash, as default. Note: Since, SPI_FLASH_TINY does not support SPI_FLASH_BAR, SPI_FLASH_TINY is not enabled for boards with SPI controllers that cannot support 4 byte addressing. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: Add lightweight SPI flash stack for SPLVignesh R
Add a tiny SPI flash stack that just supports reading data/images from SPI flash. This is useful for boards that have SPL size constraints and would need to use SPI flash framework just to read images/data from flash. There is approximately 1.5 to 2KB savings with this. Based on prior work of reducing spi flash id table by Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: Remove unused filesVignesh R
spi_flash and spi_flash_ids are no longer needed after SPI NOR migration. Remove them. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: Switch to new SPI NOR frameworkVignesh R
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD layer. Fix up sf_dataflash to work in legacy way. And update sandbox to use new interfaces/definitions Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: sf_probe: Add "jedec, spi-nor" compatible stringVignesh R
Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible SPI Flash device nodes. Therefore make U-Boot also to look for the same compatible string so that we can use Linux DTS files as is. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: spi-nor-core: Add back U-Boot specific featuresVignesh R
For legacy reasons, we will have to keep around U-Boot specific SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: spi-nor-core: Add SFDP supportVignesh R
Sync Serial Flash Discoverable Parameters (SFDP) parsing support from Linux. This allows auto detection and configuration of Flash parameters. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: spi-nor-core: Add 4 Byte addressing supportVignesh R
Sync changes from Linux SPI NOR framework to add 4 byte addressing support. This is required in order to support flashes like MT35x that no longer support legacy Bank Address Register(BAR) way of accessing >16MB region. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: spi-nor-core: Add SPI MEM supportVignesh R
Many SPI controllers have special MMIO interfaces which provide accelerated read/write access but require knowledge of flash parameters to make use of it. Recent spi-mem layer provides a way to support such controllers. Therefore, add spi-mem support to spi-nor-core as a way to support SPI controllers with MMIO interface. SPI MEM layer takes care of translating spi_mem_ops to spi_xfer()s in case of legacy SPI controllers. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07mtd: spi: Port SPI NOR framework from LinuxVignesh R
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not support 4 byte addressing opcodes, SFDP table parsing and different types of quad mode enable sequences. Many newer flashes no longer support BANK registers used by sf layer to a access >16MB of flash address space. So, sync SPI NOR framework from Linux v4.19 that supports all the above features. Start with basic sync up that brings in basic framework subsequent commits will bring in more features. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07sh: bitops: add hweight*() macrosVignesh R
Add hweight*() macros required for moving to new SF layer Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-02-07spi: Add non DM version of SPI_MEMVignesh R
Add non DM version of SPI_MEM to support easy migration to new SPI NOR framework. This can be removed once DM_SPI conversion is complete. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07spi: spi-mem: Claim SPI bus before spi mem accessVignesh R
It is necessary to call spi_claim_bus() before starting any SPI transactions and this restriction would also apply when calling spi-mem operations. Therefore claim and release bus before requesting transfer via exec_op. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer sizeVignesh R
Extend spi_mem_adjust_op_size() to take spi->max_write_size and spi->max_read_size into account. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modesVignesh R
SPI controllers support all types of SPI modes including dual/quad bus widths. Therefore remove constraint wrt SPI mode from spi-mem layer. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07bitops: Fix GENMASK definition for SandboxVignesh R
In arch/sandbox/include/asm/types.h we have Therefore for 32 bit Sandbox build BITS_PER_LONG turns out to be 32 as CONFIG_PHYS64 is not set This messes up the current logic of GENMASK macro due to mismatch b/w size of unsigned long (64 bit) and that of BITS_PER_LONG. Fix this by using CONFIG_SANDBOX_BITS_PER_LONG which is set to 64/32 based on the host machine on which its being compiled. Without this patch: GENMASK(14,0) => 0x7fffffffffff After this patch: GENMASK(14,0) => 0x7fff Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-07configs: Move CONFIG_SPI_FLASH into defconfigsVignesh R
Completely move CONFIG_SPI_FLASH from remaining board header files to defconfigs Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-06arm: dts: am33xx: introduce 'am33xx-u-boot.dtsi'Hannes Schmelzer
commit fdce9d35dc36 ("arm: dts: am33xx: Sync dts with Linux 4.20.0") did remove the "u-boot,dm-spl" flag from the 'ocp' bus which was introduced with commit 19aa4ac09db9 ("dts: am33xx: add u-boot, dm-spl to ocp bus") Due to this all boards having CONFIG_SPL_OF_CONTROL enabled are broken because they cannot bind/probe the boot-media interface during SPL stage. This commit introduces the 'am33xx-u-boot.dtsi' which is included with the auto include mechanism. The am33xx-u-boot-dtsi adds the important "u-boot,dm-pre-reloc" to the 'ocp bus' (the root bus of almost all peripherals, at least the bootable ones). The peripherials (mmc, spi, ...) needed during SPL stage need to be equipped with the 'u-boot,dm-pre-reloc' in their responsible dts file. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-02-05MAINTAINERS: update u-boot-atmel treeEugen Hristev
Update Atmel AT91 maintainership Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-02-05MAINTAINERS: Change fsl-qoriq, mpc85xx, mpc86xx maintainersYork Sun
Change maintainers to Prabhakar Kushwaha for fsl-qoriq, mpc85xx and mpc86xx. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-05Merge git://git.denx.de/u-boot-marvellTom Rini
- Move Armada XP / 38x PCIe driver to DM_PCI from me - Move Armada XP / 38x LCD driver to DM_VIDEO from me - Add uDPU board (Armada-3720) from Vladimir [trini: Fix warning in pci-uclass.c by removing ret from pci_uclass_child_post_bind as it no longer calls functions with a return code to catch.] Signed-off-by: Tom Rini <trini@konsulko.com>II
2019-02-05Merge tag 'for-master-20190205' of git://git.denx.de/u-boot-rockchipTom Rini
Removes artifacts (.rej-files) from the last merge.
2019-02-05arm: mvebu: theadorable: Enable video / LCD support with the new DM driverStefan Roese
With the new DM_VIDEO support in the Armada XP LCD driver, this patch adds the needed DT node for the LCD controller to the theadorable dts file. This DT property is not added to the Armada XP dtsi files, as this LCD feature is pretty unusual for this SoC and I personally know of no other board that uses this controller. This patch also enables CONFIG_BMP_16BPP/24BPP/32BPP, as the "old" bmp command supported these BMP files. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
2019-02-05video: Armada XP: Move driver to DM_VIDEOStefan Roese
This patch moves the Armada XP video / LCD driver to DM_VIDEO. With this move, the legacy interface board_video_init() is removed from the theadorable board code (only user of this video driver). The support via DT will be added in a separate patch. This patch also enables DM_VIDEO for the theadorable board, as this is needed to not break git bisect'ability. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
2019-02-05arm64: mvebu: Add basic support for uDPU boardVladimir Vid
This adds initial support for micro-DPU (uDPU) board which is based on Armada-3720 SoC. micro-DPU is the single-port FTTdp "distribution point unit" made by Methode Electronics which offers complete modularity with replaceable SFP modules both for uplink and downlink (G.hn over twisted-pair, G.hn over coax, 1G and 2.5G Ethernet over Cat-5e cable). On-board features: - 512 MiB DDR3 - 2 x 2.5G SFP via HSGMII SERDES interface to the A3720 SoC - USB 2.0 Type-C connector - 4GB eMMC - ETSI TS 101548 reverse powering via twisted pair (RJ45) or coax (F Type) Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Luis Torres <luis.torres@methode.com> Cc: Scott Roberts <scott.roberts@telus.com> Cc: Paul Arola <paul.arola@telus.com> Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-02-05arm: mvebu: armada-xp-theadorable.dts: Enable PCIe DT nodesStefan Roese
Now that the PCIe driver supports DM and DT parsing, enable the PCIe DT nodes that are used by this board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Phil Sutter <phil@nwl.cc> Cc: Marek Behún <marek.behun@nic.cz> Cc: VlaoMao <vlaomao@gmail.com>
2019-02-05arm: mvebu: armada-xp/37x.dtsi: Sync PCIe DT nodes with Linux v4.20Stefan Roese
This patch sync's the PCIe DT nodes with the recent Linux v4.20 version. This change makes it easier to reference specific PCIe nodes in the board dts files to e.g. enable a PCIe port as this is now necessary with the new DM PCI driver for these platforms. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Phil Sutter <phil@nwl.cc> Cc: Marek Behún <marek.behun@nic.cz> Cc: VlaoMao <vlaomao@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2019-02-05pci: pci_mvebu: Add DM_PCI support and move CONFIG_PCI_MVEBU to defconfigStefan Roese
This patch adds DM_PCI support to the MVEBU PCIe driver. This is necessary, since all PCI drivers have to be moved to DM (driver model) until the v2019.07 release. To not break git bisect'ablility, this patch also moves CONFIG_PCI_MVEBU from config headers to the defconfig files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Phil Sutter <phil@nwl.cc> Cc: Marek Behún <marek.behun@nic.cz> Cc: VlaoMao <vlaomao@gmail.com>
generated by cgit (git 2.34.1) at 2025-01-07 22:23:49 +0000