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path: root/arch/arm/cpu/armv7/mx6
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2015-03-23board/seco: Add mx6q-uq7 basic board supportBoris BREZILLON
Add basic SECO MX6Q/uQ7 board support (Ethernet, UART, SD are supported). It also adds a Kconfig skeleton to later add more SECO board (supporting SoC and board variants). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-03-23ARM: mx6: move to a standard arch/board approachBoris BREZILLON
Freescale boards are currently all defined in arch/arm/Kconfig, which makes them hard to detect. Moreover the MX6 SoC variant (Q, D, DL, S, SL) selection is currently done via the SYS_EXTRA_OPTIONS option which marked as deprecated. Move to a more standard way to select sub-architecture and board by creating a Kconfig under arch/arm/cpu/armv7/mx6 and a new ARCH_MX6 option. Existing MX6 board definitions should be moved in this new Kconfig in choice menu, and new boards should be directly declared in this menu. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-03-13mx6: soc: Switch to cold resetDirk Behme
Disable the warm reset and enable the cold reset for a more reliable restart ('reset'). This is taken from the Linux kernel, see imx_src_init() in arch/arm/mach-imx/src.c. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
2015-03-13imx:mx6 remove duplicated includesPeng Fan
There is no need to include asm/bootm.h twice, so remove one. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-02-17ARM: imx6 Add WDOG3 for i.MX6SXPeng Fan
There are three wdogs for i.MX 6SoloX. Add wdog3 support in function imx_set_wdog_powerdown. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-02-17ARM: imx6: disable bandgap self-bias after bootPeng Fan
The self-bias circuit is used by the bandgap during startup. Once the bandgap has stabilized, the self-bias circuit should be disabled for best noise performance of analog blocks. Also this bit should be disabled before the chip enters STOP mode or when ever the regular bandgap is disabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
2015-02-10imx: mx6: Fixed AIPS3 base address issueYe.Li
Should use AIPS3 configuration address 0x0227C000 to set AIPS3, not the AIPS3 base address. Additional, replace AIPS1_BASE_ADDR to AIPS3_ARB_BASE_ADDR to align with AIPS1 and AIPS2, and resolve the AIPS3_ARB_BASE_ADDR undefine problem. Signed-off-by: Ye.Li <B37916@freescale.com>
2015-01-22imx:mx6sx add dram io configure for mx6sxPeng Fan
Define two structure mx6sx_iomux_ddr_regs and mx6sx_iomux_grp_regs. Add a new function mx6sx_dram_iocfg to configure dram io. Since mx6sx only have one channel mmdc0, define a new empty macro MMDC1 to replace mmdc1->entry=value for mx6sx. And to other mx6 soc, MMDC1 effects as "mmdc1->entry=value". Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-01-02Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
2014-12-31arm:mx6sx add QSPI supportPeng Fan
Add QSPI support for mx6solox. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-12-19imx:mx6 fix return value of mxc_get_clockPeng Fan
mxc_get_clock's return type is unsigned int. 'return -1' is same with 'return 0xffffffff', so 0 should be used as the return value when unsupported mxc_clock type is passed to mxc_get_clock. Also include an err message when unsupported mxc_clock type is passed to mxc_get_clock. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-12-01arm: mx6: Change defines ENET_xxMHz to ENET_xxMHZ (no CamelCase)Stefan Roese
As checkpatch complaines about these camel-case defines, lets change them to only use upper-case characters. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jon Nettleton <jon.nettleton@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-24arm: mx6: introduce disable_sata_clockNikita Kiryanov
Implement disable_sata_clock for mx6 SoCs. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de>
2014-11-21mx6: thermal: Check cpu temperature via thermal sensorYe.Li
Add imx6 thermal device to mx6 soc file. Read the cpu temperature using this device to access onchip thermal sensor. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-11-21mx6: clock: Add thermal clock enable functionNitin Garg
Add api to check and enable pll3 as required for thermal sensor driver. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-11-12arm: imx: make bmode command work with SPL/U-Boot comboNikita Kiryanov
The bmode command forces the SoC to use a specific boot device by writing its boot mode into SRC_GPR9, and notifying the SoC of the change using SRC_GPR10[28] bit: if the bit is on, bootROM uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine the boot device. SPL on the other hand is oblivious to this distinction, so once the bootROM loads SPL from the device configured in SRC_GPR10, SPL will attempt to load U-Boot from the device configured in SRC_SMBR1, which is not updated by the bootROM to the value in SRC_GPR9. The result is that the selected boot device is not used across all the boot stages. Update spl_boot_device() to look at gpr9 when necessary. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Heiko Schocher <hs@denx.de>
2014-11-05Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2014-11-03imx: mx6sl: Set the preclk clock source to OSC 24MhzYe.Li
For MX6SL, uses the OSC 24Mhz as the preclk source in CCM. Align the preclk setting with kernel. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-11-03imx: mx6: Change the get_ipg_per_clk for OSC 24Mhz sourceYe.Li
For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix the get_ipg_per_clk function to support it. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-10-27Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini
2014-10-25imx: add missing includesJeroen Hofstee
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-21ARM: i.MX6: include prototype for get_board_rev()Eric Nelson
Include <asm/bootm.h> to see the prototype for get_board_rev() and prevent warning "Should it be static?" with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-10-08Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD
The single file conflict below is actually trivial. Conflicts: board/boundary/nitrogen6x/nitrogen6x.c
2014-09-29imx: mx6: Checking PLL2 PFD0 and PFD2 for periph_clk before PFD resetYe.Li
Checking the pre_periph_clk_sel and pre_periph2_clk of CCM CBCMR register, if the PLL2 PFD0 or PLL2 PFD2 is used for the clock source, do not reset this PFD to avoid system hang. Customers may set this in DDR script or use BT_FREQ to select low freq boot. Signed-off-by: Ye.Li <B37916@freescale.com>
2014-09-24cosmetic: replace MIN, MAX with min, maxMasahiro Yamada
The macro MIN, MAX is defined as the aliase of min, max, respectively. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-22imx: Support i.MX6 High Assurance Boot authenticationNitin Garg
When CONFIG_SECURE_BOOT is enabled, the signed images like kernel and dtb can be authenticated using iMX6 CAAM. The added command hab_auth_img can be used for HAB authentication of images. The command takes the image DDR location, IVT (Image Vector Table) offset inside image as parameters. Detailed info about signing images can be found in Freescale AppNote AN4581. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-09-11imx: Fix build of mx6sxsabresdStefano Babic
Commit 224beb833e544b802f08765271cec07667d39669 add clock enabling function for FEC, but the masks are not available for SX processor and the mx6sxsabresd cannot be built clean. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Nikita Kiryanov <nikita@compulab.co.il>
2014-09-09pcie_imx: Add mx6solox supportFabio Estevam
Let PCI on mx6solox also be supported. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
2014-09-09mx6: Fix ECSPI typo in soc_boot_modesNikolay Dimitrov
Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
2014-09-09iMX6: Disable the L2 before chaning the PL310 latencyYe.Li
The Latency parameters of PL310 Tag RAM latency control register and Data RAM Latency control register are set in L2 cache enable. And setting these registers must have PL310 NOT enabled. But when using Plugin mode boot, the PL310 is enabled by bootrom. The patch disables the PL310 before applying this setting. Signed-off-by: Ye.Li <Ye.Li@freescale.com>
2014-09-09arm: mx6: ddr: fix cs0_end calculationNikita Kiryanov
Current way of calculation CS0_END field for MMDCx_MDASP register is problematic because in most cases the user is forced to define cs_density in an unnatural way: as value - 2, instead of value. This breaks the abstraction provided by struct mx6_ddr_sysinfo because the user is forced to be aware of the way the calculation is performed. Refactor the calculation. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-09-09arm: mx6: ddr: configure MMDC for slow_pdNikita Kiryanov
According to MX6 TRM, both MMDC and DRAM should be configured to the same powerdown precharge. Currently, mx6_dram_cfg() configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for 'slow exit (DLL off)' (MR0[12] = 0). Configure MMDC for slow pd. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Tim Harvey <tharvey@gateworks.com>
2014-09-09arm: mx6: ddr: do not write into reserved bitNikita Kiryanov
Bit 16 in mapsr register is in a reserved field. Don't write to it. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-09-09arm: mx6: ddr: cleanupNikita Kiryanov
No functional changes. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-09-09mx6: add clock enabling functionsNikita Kiryanov
Add functions to enable/disable clocks for UART, SPI, ENET, and MMC. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2014-08-20mx6sx: Adjust enable_fec_anatop_clock() for mx6soloxFabio Estevam
Configure and enable the ethernet clock for mx6solox. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-08-20ARM: mx6: Handle the MMDCx_MDCTL COL field capricesMarek Vasut
The COL field value cannot be easily calculated from the desired column number. Instead, there are special cases for that, see the datasheet, MMDCx_MDCTL field description, field COL . Cater for those special cases. Signed-off-by: Marek Vasut <marex@denx.de>
2014-08-20mx6: add support of multi-processor commandGabriel Huau
This allows u-boot to load different OS or Bare Metal application on different cores of the i.MX6 SoC. For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1. Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Stefano Babic <sbabic@denx.de>
2014-07-23i.MX6: add enable_spi_clk()Heiko Schocher
add enable_spi_clk(), so board code can enable spi clocks. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de>
2014-07-23mx6: soc: Do not apply the PFD erratum for mx6soloxFabio Estevam
The PFD issue is not present on mx6solox, so skip it in this case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-10mx6: clock: Do not enable sata and ipu clocksFabio Estevam
mx6sx does not have sata nor ipu blocks, so do not handle such clocks. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-10mx6: Add support for the mx6solox variantFabio Estevam
mx6solox is the newest member of the mx6 family. Some of the new features on this variants are: - Cortex M4 microcontroller (besides the CortexA9) - Dual Gigabit Ethernet Add the initial support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-09mx6: soc: Update the comments of set_ldo_voltage()Fabio Estevam
Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces set_ldo_voltage() function that can be used to set the voltages of any of the three LDO regulators controlled by the PMU_REG_CORE register. Prior to this commit there was a single set_vddsoc() which only configured the VDDSOC regulator. Update the comments to align with the new set_ldo_voltage() implementation. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-07-09MX6: Correct calculation of PLL_SYSAndre Renaud
DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do the shift after the multiply to avoid rounding errors Signed-off-by: Andre Renaud <andre@bluewatersys.com>
2014-06-17imx: correct HAB status for new chip TOStefano Babic
According to: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0 ENGR00287268 mx6: fix the secure boot issue on the new tapout chip commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b newer i.MX6 silicon revisions have an updated ROM and HAB API table. Please see also: i.MX Applications Processors Documentation Engineering Bulletins EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison With this change the secure boot status is correctly displayed Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-06-06mx6: add mmdc configuration for MX6Q/MX6DLTim Harvey
- add function for configuring iomux based on board-specific regs - add function for configuring mmdc based on board-specific and chip-specific data Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2014-02-11ARM: imx6: fix wrong fec clkMarkus Niebel
imx_get_fecclk() returns enet_ref instead of ipg. Since the clock is used to calculate the prescaler for the MDIO interface wrong values can be calculated. Tested on a custom MX6S board with 100MBit interface Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
2014-02-11mx6: Enable L2 cache supportFabio Estevam
Add L2 cache support and enable it by default. Configure the L2 cache in the same way as done by FSL kernel: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
2014-02-11mx6: Distinguish mx6dual from mx6quadFabio Estevam
Currently when we boot a mx6dual U-boot reports that it is a mx6quad. Report it as MX6D instead: CPU: Freescale i.MX6D rev1.2 at 792 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2014-02-11imx6: make sure MMDC_CHx_MASK is clear to avoid warm reset failureAnson Huang
Boot ROM may mask MMDC_CHx_MASK in CCM_CCDR(such as i.MX6SL TO1.2), it will cause warm reset fail, need to clear this MMDC_CHx_MASK field to make sure all the i.MX6 series SOCs reset function work. Otherwise, uboot "reset" command will fail, tested on i.MX6SL EVK board with TO1.2. Signed-off-by: Anson Huang <b20788@freescale.com>
generated by cgit (git 2.34.1) at 2025-01-16 22:18:20 +0000