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move arm/arm/cpu/armv7/s5pc1xx to arch/arm/mach-s5pc1xx
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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As we discussed a couple of times, negative CONFIG options make our
life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ...
and here is another one.
Now, there are three boards enabling OF_CONTROL on SPL:
- socfpga_arria5_defconfig
- socfpga_cyclone5_defconfig
- socfpga_socrates_defconfig
This commit adds CONFIG_SPL_OF_CONTROL for them and deletes
CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert
the logic.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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We plan to enable device tree in SPL by default. Before doing this,
explicitly disable it for all boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
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By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Rini <trini@konsulko.com>
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Now CONFIG_SPL_BUILD is not defined in Kconfig, so
"!depends on SPL_BUILD" and "if !SPL_BUILD" are redundant.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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This commit introduces a Kconfig symbol for each ARM CPU:
CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136,
CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100.
Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected
for CPU_ARM1176 and CPU_V7.
For each target, the corresponding CPU is selected and the definition of
SYS_CPU in the corresponding Kconfig file is removed.
Also, it removes redundant "string" type in some Kconfig files.
Signed-off-by: Georges Savoundararadj <savoundg@gmail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Move cache handling code to C file, and add enable_caches() and
disable_caches() functions.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Change this board to add a device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Change this board to add a device tree.
This also adds a pinmux header file although it is not used as yet.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
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Use ENTRY and ENDPROC with assembly functions to ensure
necessary assembler directives for all functions.
Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
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adapt s5pc1xx to the new layered cache maintenance framework
Signed-off-by: Aneesh V <aneesh@ti.com>
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This patch added set_mmc_clk for external clock control.
c210 didn't support host clock control.
So We need external_clock_control function for c210.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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SROM config code is made common for S5P series of boards.
smdkc100.c now refers to s5p-common/sromc.c for SROM related
subroutines.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Because of the bss area is cleared after relocation, we've lost pointers.
This patch fixed it.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils. As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".
This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.
The name of each former library archive is preserved except for
extensions which change from ".a" to ".o". This commit updates
references accordingly where needed, in particular in some linker
scripts.
This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols. Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.
Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
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Because of peripheral devices can select clock sources,
separate the peripheral clocks. (pwm, uart and so on)
It just return the pclk at s5pc1xx SoC,
but s5pc210 SoC must be calculated by own clock register setting.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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Because of these are common files around s5p Socs, rename from s5pc1xx to s5p.
And getting cpu_id is SoC specific, so move to SoC's header file.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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This patch adds basic support for s5pc210.
s5p-common will be used by all of s5p SoCs.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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base address
This patch is intended to prepare the other S5P SoC. (s5pc210)
If use SoC specific defines then can't share with other SoC.
So, make the accessor functions for access the base address by common way.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9
Cortex A8 and A9 both belong to the armv7 architecture, hence the name change.
The two architectures are similar enough that substantial code can be shared.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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