Age | Commit message (Expand) | Author |
---|---|---|
2013-09-23 | arm: zynq: Fix timer loadaddress | Michal Simek |
2013-08-12 | zynq: slcr: Wait 100ms till clk is properly setup | Michal Simek |
2013-08-12 | zynq: Add new ddrc driver for ECC support | Michal Simek |
2013-07-24 | Add GPL-2.0+ SPDX-License-Identifier to source files | Wolfgang Denk |
2013-05-06 | fpga: zynq: Add support for loading bitstream | Michal Simek |
2013-04-30 | net: gem: Fix gem driver on 1Gbps LAN | Michal Simek |
2013-04-30 | zynq: Move scutimer baseaddr to hardware.h | Michal Simek |
2013-04-30 | arm: zynq: U-Boot udelay < 1000 FIX | David Andrey |
2013-02-07 | arm: zynq: Add lowlevel initialization to C | Michal Simek |
2013-02-07 | arm: zynq: Add SLCR support with system reset | Michal Simek |
2013-02-01 | arm: Move lastinc to arch_global_data | Simon Glass |
2013-02-01 | arm: Move tbl to arch_global_data | Simon Glass |
2012-10-04 | arm: Support new Xilinx Zynq platform | Michal Simek |