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2016-07-22armv7: armv7: introduce set_gpmc_cs0Ladislav Michl
Allow boards to runtime detect flash type. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2016-07-22armv7: make gpmc_cfg constLadislav Michl
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> [trini: Adapt am33xx, duovero, omap_zoom1] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-07-22armv7: add reset timeout to identify_nand_chipLadislav Michl
identify_nand_chip hangs forever in loop when NAND is not present. As IGEPv2 comes either with NAND or OneNAND flash, add reset timeout to let function fail gracefully allowing caller to know NAND is not present. On NAND equipped board, reset succeeds on first read, so 1000 loops seems to be safe timeout. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2016-07-20mx6: clock: Fix the logic for reading axi_alt_selFabio Estevam
According to the IMX6DQRM Reference Manual, the description of bit 7 (axi_alt_sel) of the CCM_CBCDR register is: "AXI alternative clock select 0 pll2 396MHz PFD will be selected as alternative clock for AXI root clock 1 pll3 540MHz PFD will be selected as alternative clock for AXI root clock " The current logic is inverted, so fix it to match the reference manual. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-19Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/cpu/armv8/Makefile arch/arm/lib/bootm-fdt.c
2016-07-19ARMv8/PSCI: Fixup the device tree for PSCIHou Zhiqiang
Set the enable-method in the cpu node to PSCI, and create device node for PSCI, when PSCI was enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-19mx7_common: use Kconfig for ARMv7 non-secure modeStefan Agner
Use existing Kconfig symbols to let the user configure whether to build a U-Boot with non-secure mode support or not. This also allows to enable virtualization extension easily. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-07-19mx7: set soc environment according to exact SoC typeStefan Agner
This can be useful if the same U-Boot binary is used for boards available with a i.MX 7Solo and i.MX 7Dual. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-16Various, unrelated tree-wide typo fixes.Robert P. J. Day
Fix a number of typos, including: * "compatble" -> "compatible" * "eanbeld" -> "enabled" * "envrionment" -> "environment" * "FTD" -> "FDT" (for "flattened device tree") * "ommitted" -> "omitted" * "overriden" -> "overridden" * "partiton" -> "partition" * "propogate" -> "propagate" * "resourse" -> "resource" * "rest in piece" -> "rest in peace" * "suport" -> "support" * "varible" -> "variable" Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2016-07-15Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini
2016-07-15ARM: PSCI: Make psci_get_cpu_stack_top local to armv7/psci.SChen-Yu Tsai
Now that we have a secure data section for storing variables, there should be no need for platform code to get the stack address. Make psci_get_cpu_stack_top a local function, as it should only be used in armv7/psci.S and only by psci_stack_setup. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-15ARM: PSCI: Switch to per-CPU target PC storage in secure data sectionChen-Yu Tsai
Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-15ARM: PSCI: Add helper functions to access per-CPU target PC storageChen-Yu Tsai
Now that we have a data section, add helper functions to save and fetch per-CPU target PC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-15ARM: Move __secure definition to common asm/secure.hChen-Yu Tsai
sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-15ARM: PSCI: Remove unused psci_text_end symbolChen-Yu Tsai
psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-15ARM: PSCI: Allocate PSCI stack in secure stack sectionChen-Yu Tsai
Now that we have a secure stack section that guarantees usable memory, allocate the PSCI stacks in that section. Also add a diagram detailing how the stacks are placed in memory. Reserved space for the target PC remains unchanged. This should be moved to global variables within a secure data section in the future. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-15sunxi: Move remaining PSCI assembly code to CChen-Yu Tsai
This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-15ARM: PSCI: Split out common stack setup code from psci_arch_initChen-Yu Tsai
Every platform has the same stack setup code in assembly as part of psci_arch_init. Move this out into a common separate function, psci_stack_setup, for all platforms. This will allow us to move the remaining parts of psci_arch_init into C code, or drop it entirely. Also provide a stub no-op psci_arch_init for platforms that don't need their own specific setup code. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-14arm: Don't invalidate unaligned cache regionsSimon Glass
At present armv7 will unhappily invalidate a cache region and print an error message. Make it skip the operation instead, as it does with other cache operations. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2016-07-14arm: Move check_cache_range() into a common placeSimon Glass
This code is common, so move it into a common file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
2016-07-14ARM: OMAP5+: Enable errata i727Lokesh Vutla
Errata i727 is applicable on all OMAP5 and DRA7 variants but enabled only on OMAP5 ES1.0. So, enable it on all platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14arm: am4x: add U-Boot FIT signing and SPL image post-processingMadan Srinivas
Modify the SPL build procedure for AM437x high-security (HS) device variants to create a secure u-boot_HS.img FIT blob that contains U-Boot and DTB artifacts signed (and optionally encrypted) with a TI-specific process based on the CONFIG_TI_SECURE_DEVICE config option and the externally-provided image signing tool. Also populate the corresponding FIT image post processing call to be performed during SPL runtime. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14arm: omap5: add U-Boot FIT signing and SPL image post-processingAndreas Dannenberg
Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS) device variants to create a secure u-boot_HS.img FIT blob that contains U-Boot and DTB artifacts signed with a TI-specific process based on the CONFIG_TI_SECURE_DEVICE config option and the externally-provided image signing tool. Also populate the corresponding FIT image post processing call to be performed during SPL runtime. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14arm: omap-common: Update to generate secure U-Boot FIT blobAndreas Dannenberg
Adds commands so that when a secure device is in use and the SPL is built to load a FIT image (with combined U-Boot binary and various DTBs), these components that get fed into the FIT are all processed to be signed/encrypted/etc. as per the operations performed by the secure-binary-image.sh script of the TI SECDEV package. Furthermore, perform minor comments cleanup to make better use of the available space. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-14arm: omap-common: secure ROM signature verify APIAndreas Dannenberg
Adds an API that verifies a signature attached to an image (binary blob). This API is basically a entry to a secure ROM service provided by the device and accessed via an SMC call, using a particular calling convention. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14arm: omap-common: add secure rom call API for secure devicesAndreas Dannenberg
Adds a generic C-callable API for making secure ROM calls on OMAP and OMAP-compatible devices. This API provides the important function of flushing the ROM call arguments to memory from the cache, so that the secure world will have a coherent view of those arguments. Then is simply calls the omap_smc_sec routine. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14arm: omap-common: add secure smc entryDaniel Allred
Add an interface for calling secure ROM APIs across a range of OMAP and OMAP compatible high-security (HS) device variants. While at it, also perform minor cleanup/alignment without any change in functionality. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14arm: cache: add missing dummy functions for when dcache disabledDaniel Allred
Adds missing flush_dcache_range and invalidate_dcache_range dummy (empty) placeholder functions to the #else portion of the #ifndef CONFIG_SYS_DCACHE_OFF, where full implementations of these functions are defined. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-12imx6: clock: typo fixPeng Fan
Typo fix, "PPL2 -> PLL2" Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-07-12mx6: Add Phytec PCM058 i.MX6 QuadStefano Babic
Add Phytec-i.MX6 SOM with NAND Support: - 1GB RAM - Ethernet - SPI-NOR Flash - NAND (1024 MB) - external SD - UART Signed-off-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12mx6: add support for el6x boardStefano Babic
Custom Board based on MX6 Dual, 1GB RAM and eMMC. There are two variants of the board with and without PCIe (ZC5202 and ZC5601). Signed-off-by: Stefano Babic <sbabic@denx.de>
2016-06-26common: Pass the boot device into spl_boot_mode()Marek Vasut
The SPL code already knows which boot device it calls the spl_boot_mode() on, so pass that information into the function. This allows the code of spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets board_boot_order() correctly alter the behavior of the boot process. The later one is important, since in certain cases, it is desired that spl_boot_device() return value be overriden using board_boot_order(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> [add newly introduced zynq variant] Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-24arm: bcm235xx: update clock frameworkSteve Rae
The handling of the "usage counter" is incorrect, and the clock should only be disabled when transitioning from 1 to 0. Reported-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24arm: bcm235xx: fix kps ccuChris Brand
The Kona Peripheral Slave CCU has 4 policy mask registers, not 8. Signed-off-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24ARM: armv7: refactor Makefile slightlyMasahiro Yamada
Use Kbuild standard style where possible. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24omap3: bugfix in timer on rolloverDaniel Gorsulowski
Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
2016-06-20sunxi: Add PSCI implementation in CChen-Yu Tsai
To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20sunxi: Add base address for GICChen-Yu Tsai
Instead of hardcoding the GIC addresses in the PSCI implementation, provide a base address in the cpu header. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20sunxi: Make CPUCFG_BASE macro names the same across familiesChen-Yu Tsai
Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20ARM: PSCI: save and restore clobbered registers in v7_flush_dcache_allChen-Yu Tsai
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20ARM: PSCI: use only r0 and r3 in psci_get_cpu_stack_top()Chen-Yu Tsai
For psci_get_cpu_stack_top() to be usable in C code, it must adhere to the ARM calling conventions. Since it could be called when the stack is still unavailable, and the entry code to linux also expects r1 and r2 to remain unchanged, stick to r0 and r3. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-13board: am57xx: Rename TARGET_BEAGLE_X15 as TARGET_AM57XX_EVMLokesh Vutla
board/am57xx supports all boards based on am57xx. Rename the taget as TARGET_AM57XX_EVM. Fixes: 74cc8b097d9af ("board: ti: beagle_x15: Rename to indicate support for TI am57xx evms") Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-06-13board: arm:: Add support for Broadcom BCM23550Steve Rae
Add support for the Broadcom BCM23550 board. Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-13Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2016-06-12arm: Allow skipping of low-level init with I-cache onSimon Glass
At present CONFIG_SKIP_LOWLEVEL_INIT prevents U-Boot from calling lowlevel_init(). This means that the instruction cache is not enabled and the board runs very slowly. What is really needed in many cases is to skip the call to lowlevel_init() but still perform CP15 init. Add an option to handle this. Reviewed-by: Heiko Schocher <hs@denx.de> Tested-on: smartweb, corvus, taurus, axm Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-12arm: dra7xx: Assign omap_vcores based on board typeKeerthy
Currently omap_vcores which holds pmic data is being assigned based on the SoC type. PMIC is not a part of SoC. It is logical to to assign omap_vcores based on board type. Hence over ride the vcores_init function and assign omap_vcores based on the board type. Reported-by: Nishanth Menon <nm@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
2016-06-12Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2016-06-09mtd: nand: omap: allow to switch to BCH16Heiko Schocher
support in omap_nand_switch_ecc() also an eccstrength from 16. Signed-off-by: Heiko Schocher <hs@denx.de>
2016-06-09armv7: omap-common: make SPL board_mmc_init() weakHeiko Schocher
make this function weak, so board code can setup in SPL MMC init with board special values. Signed-off-by: Heiko Schocher <hs@denx.de>
2016-06-09arm, am335x: Enable Spread Spectrum for the MPUHeiko Schocher
Enable Spread Spectrum for the MPU by calculating the required values and setting the registers accordingly. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
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