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On LS1043A rev1.0 there are 4 interrupt pins for INTx, and on
rev1.1 there is only 1 for INTx, so the current fixup is inverse
of the fact.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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LS1043A/LS1023A 23x23 package silicon has different SVR:VAR_PER.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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TFABOOT support includes:
- ls2088ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
- remove EL3 specific erratas for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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TFABOOT support includes:
- ls1088ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- MC address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
- ifc chip select changes for TFABOOT
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Fixes for TFABOOT framework
- update eMMC bootsrc to SD_MMC
- Increase buffer size for mcinitcmd from 256 to 512
- Fix mcinitcmd and bootcmd for Secure Boot
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add Kconfig option WATCHDOG_RESET_DISABLE to disable watchdog reset
in imx_watchdog driver, so that the watchdog will not be fed in
u-boot if CONFIG_WATCHDOG_RESET_DISABLE is enabled.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
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Support watchdog driver for fsl-lsch2. It's disabled in default.
If you want to use it, please enable CONFIG_IMX_WATCHDOG.
Define CONFIG_WATCHDOG_TIMEOUT_MSECS to set watchdog timeout.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
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LX2160A Soc is based on Layerscape Chassis Generation 3.2
architecture with features:
16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
4 TZASC instances, etc.
SoC personalites:
LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs
LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs
Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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NXP layerscape architecture Chassis 3.2 builds upon chassis3
architecture with changes like DDR Memory map change,
removal of IFC and support of upto 8 I2C controller.
Patch add README.lsch3_2 and the above changes under
macro CONFIG_NXP_LSCH3_2.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Some lsch3 based SoCs like lx2160a contains three
serdes modules.
Add support for third serdes protocol in lsch3
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add support of MC framework for TFA
Make MC framework independent of boot source.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Workaround of erratum A010539 clears the RCW source field in PORSR1
register, causing failure of detecting boot source using this method.
Use SMC call if U-Boot runs at EL2. If SMC is not implemented or
running at EL3, continue to read PORSR1 and presume QSPI as boot
source if erratum workaround A010539 is enabled and RCW source is
cleared.
Signed-off-by: York Sun <york.sun@nxp.com>
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OCRAM initialization is performed by TFA, Hence
skipped from u-boot.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Adds SMC calls for getting DDR size and bank info for TFABOOT.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Adds bootcmd identificaton on basis on boot source, valid
in TFABOOT configuration.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
[YS: remove unnecessary braces]
Reviewed-by: York Sun <york.sun@nxp.com>
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Removes EL3 specific erratas for TFABOOT, And now taken care in TFA.
ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511,
SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663,
SYS_FSL_ERRATUM_A009803, SYS_FSL_ERRATUM_A009942,
SYS_FSL_ERRATUM_A010165
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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PORSR register holds the cfg_rcw_src field which can be used
to identify boot source.
Further, it can be used to select the environment location.
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix multiple checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
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Adds TFABOOT support config option and add generic code to enable
execution from DDR.
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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Change tlb base address from OCRAM to DDR when exception level is
less than 3.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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In case SError happens at EL2, if SCR_EL3[EA] is not routing it to
EL3, and SCR_EL3[RW] is set to aarch64, setting HCR_EL2[AMO] routes
the exception to EL2. Otherwise this exception is not taken.
Signed-off-by: York Sun <york.sun@nxp.com>
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Move static definitions to cpu.c file, as it doesn't allow
the cpu.h file to be included in multiple c files.
Signed-off-by: York Sun <york.sun@nxp.com>
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Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
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Reuse the existing ICID setup code done for LS1046A smmu enablement
and add the equivalent setup for LS1043A chips.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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This patch adds esdhc clock support for ls1088a and ls2088a.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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At present the MMC subsystem maintains its own list of MMC devices.
This cannot work with driver model when CONFIG_BLK is enabled, use
blk_dread to replace previous mmc read interface, use
mmc_get_blk_desc to get the mmc device property.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
[York S: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
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Use CONFIG_IS_ENABLED(EFI_LOADER) to avoid explicitly checking CONFIG_SPL
too. This simplifies the conditional.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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Update README.falcon to use "none" for compression property for
ramdisk image to avoid being uncompressed upon loading.
Signed-off-by: York Sun <york.sun@nxp.com>
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Program Central Security Unit (CSU) to grant access to USB 2.0
controller.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: rewrite commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
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Add support for SEC ICID configuration and apply it for ls1046a.
Also add code to make the necessary device tree fixups.
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add support for ICID setting of fman ports and the required device
tree fixups.
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add infrastructure for ICID setup and device tree fixup on ARM
platforms. This include basic ICID setup for several devices.
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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The include/phy.h will start including dm.h, which pulls in
linux/compat.h after the attempted redefinition in
arch/arm/include/asm/armv8/mmu.h, so move this include to allow
redefinition.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
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A new defconfig is introduced to support SPL boot from QSPI NOR
flash. This is to support falcon mode for faster booting into
Linux.
Signed-off-by: York Sun <york.sun@nxp.com>
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To get full access of QSPI space, initialize AHB interface.
Signed-off-by: York Sun <york.sun@nxp.com>
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Remove the old implementation in order to enable DM for sata.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
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Enable I-cache for SPL boot to boost performance. Earlier MMU was
enabled only for LS2080A and has since been dropped by commit
f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build").
Signed-off-by: York Sun <york.sun@nxp.com>
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cpu_cmd() is reading cpu number via simple_strtoul() which is always
unsigned type.
Platform code implementations are not expecting that nr can be negative
and there is not checking in the code for that too.
This patch is using u32 type for cpu number to make sure that platform
code get proper value range.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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PPA firmware and header address may vary depending upon different
boards, configure ppa firmware and header address in board specific
Kconfig.
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Mask HRESET_B after cleared the the RCW_SRC, because in the workaround
we override the RCW_SRC and if HRESET_B is issued after the override
then SoC cannot find valid RCW as the RCW_SRC was overwritten and
result in hang. So we need to mask HRESET_B in case user asserts it,
and the PORESET_B should be asserted which leads to resampling of
cfg_rcw_src pins and loading of correct RCW_SRC.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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JR3 was getting removed from device tree only if random number
generation was successful. However, if SEC firmware is present,
JR3 should be removed from device tree node irrespective of the
random seed generation as SEC firmware reserves it for it's use.
Not removing it in case of random number generation failure causes
the kernel to crash.
Random number generation was being called twice. This is not
required. If SEC firmware is running, SIP call can be made to the SEC
firmware to get the random number. This call itself would return
failure if function is not supported. Duplicate calling of random
number generation function has been removed.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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TZASC controller configurations are similar. Put them in a macro and
avoid code duplication.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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The default of DISTRO_DEFAULTS is messy. Using the 'imply' keyword
is equivalent and cleaner.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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EFI_RESET_PLATFORM_SPECIFIC is one of the values that can be used for the
EFI service ResetSystem. The missing definition is added. The value has to
handled in efi_reset_system().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
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efi_reset_system_init provides the architecture or board specific
initialization of the EFI subsystem. Errors should be caught and
signalled by a return code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
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