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authorTom Rini <trini@konsulko.com>2018-07-27 13:09:30 -0400
committerTom Rini <trini@konsulko.com>2018-07-27 13:09:30 -0400
commit0e8a8a311020d317fcfcf594e8e3fb1598134593 (patch)
tree5410444f60514df7074ba038aa3e33c44f7dcf23 /arch/arm/cpu/armv8/fsl-layerscape
parent11e409284ee593c980e16d93d12c5e19c99b62c0 (diff)
parent86b840b78d0eba652f65841a870d232ab743612e (diff)
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon10
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c54
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/spl.c8
3 files changed, 18 insertions, 54 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon
index a00b5bc9c3..7dae9f03c3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon
+++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon
@@ -129,6 +129,16 @@ Example:
The "loadables" is not optional. It tells SPL which images to load into memory.
+Falcon mode with QSPI boot
+--------------------------
+To use falcon mode with QSPI boot, SPL needs to be enabled. Similar to SD or
+NAND boot, a RAM version full feature U-Boot is needed. Unlike SD or NAND boot,
+SPL with QSPI doesn't need to combine SPL image with RAM version image. Two
+separated images are used, u-boot-spl.pbl and u-boot.img. The former is SPL
+image with RCW and PBI commands to load the SPL payload into On-Chip RAM. The
+latter is RAM version U-Boot in FIT format (or legacy format if FIT is not
+used).
+
Other things to consider
-----------------------
Falcon boot skips a lot of initialization in U-Boot. If Linux expects the
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index bfd663942a..8028d5228f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -6,8 +6,6 @@
#include <common.h>
#include <fsl_immap.h>
#include <fsl_ifc.h>
-#include <ahci.h>
-#include <scsi.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
#include <asm/io.h>
@@ -330,36 +328,6 @@ void fsl_lsch3_early_init_f(void)
#endif
}
-#ifdef CONFIG_SCSI_AHCI_PLAT
-int sata_init(void)
-{
- struct ccsr_ahci __iomem *ccsr_ahci;
-
-#ifdef CONFIG_SYS_SATA2
- ccsr_ahci = (void *)CONFIG_SYS_SATA2;
- out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
- out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG);
- out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG);
- out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
- out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);
-#endif
-
-#ifdef CONFIG_SYS_SATA1
- ccsr_ahci = (void *)CONFIG_SYS_SATA1;
- out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
- out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG);
- out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG);
- out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
- out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);
-
- ahci_init((void __iomem *)CONFIG_SYS_SATA1);
- scsi_scan(false);
-#endif
-
- return 0;
-}
-#endif
-
/* Get VDD in the unit mV from voltage ID */
int get_core_volt_from_fuse(void)
{
@@ -400,25 +368,6 @@ int get_core_volt_from_fuse(void)
}
#elif defined(CONFIG_FSL_LSCH2)
-#ifdef CONFIG_SCSI_AHCI_PLAT
-int sata_init(void)
-{
- struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
-
- /* Disable SATA ECC */
- out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000);
- out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
- out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG);
- out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG);
- out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
- out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);
-
- ahci_init((void __iomem *)CONFIG_SYS_SATA);
- scsi_scan(false);
-
- return 0;
-}
-#endif
static void erratum_a009929(void)
{
@@ -719,9 +668,6 @@ int qspi_ahb_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
-#ifdef CONFIG_SCSI_AHCI_PLAT
- sata_init();
-#endif
#ifdef CONFIG_CHAIN_OF_TRUST
fsl_setenv_chain_of_trust();
#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index dba4b40607..3e53084b21 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -11,6 +11,7 @@
#include <fsl_csu.h>
#include <asm/arch/fdt.h>
#include <asm/arch/ppa.h>
+#include <asm/arch/soc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -22,6 +23,9 @@ u32 spl_boot_device(void)
#ifdef CONFIG_SPL_NAND_SUPPORT
return BOOT_DEVICE_NAND;
#endif
+#ifdef CONFIG_QSPI_BOOT
+ return BOOT_DEVICE_NOR;
+#endif
return 0;
}
@@ -52,6 +56,7 @@ void spl_board_init(void)
void board_init_f(ulong dummy)
{
+ icache_enable();
/* Clear global data */
memset((void *)gd, 0, sizeof(gd_t));
board_early_init_f();
@@ -101,6 +106,9 @@ void board_init_f(ulong dummy)
gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1);
gd->arch.tlb_allocated = gd->arch.tlb_addr;
#endif /* CONFIG_SPL_FSL_LS_PPA */
+#if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT)
+ qspi_ahb_init();
+#endif
}
#ifdef CONFIG_SPL_OS_BOOT