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2014-05-31Exynos: Make sure ps_hold gets set in the SPLDoug Anderson
Setting ps_hold ought to be one of the first things we do when we first boot up. If we wait until the main u-boot runs we won't set it in time and the PMIC may power us back off. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-30Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2014-05-29Remove unnecessary use of hush header fileSimon Glass
Some files include hush.h but don't actually use it. Remove this where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
2014-05-28exynos: Enable PSHOLD in SPLSimon Glass
There is quite a tight deadline in enabling PSHOLD, less than a second. In some cases (e.g. with USB download), U-Boot takes longer than that to load, so the board powers off before U-Boot starts. Add a call in SPL to enable PSHOLD. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-27ARM: at91sam9m10g45ek: enable mci0 supportWu, Josh
Also we enable the mmc command in configuration file. As both CONFIG_CMD_MMC and CONFIG_CMD_USB use the CONFIG_DOS_PARTITION, so remove the redundant CONFIG_DOS_PARTITION definition. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-05-27arm:at91: enable ROM loadable atmel imageAndreas Bießmann
For sama5d3xek we need to modify the SPL image for correct detection by ROM code. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Bo Shen <voice.shen@atmel.com>
2014-05-27ARM: atmel: switch to main crystal osc for SPL bootBo Shen
If without switch to main crystal oscillator, the sama5d3 SoC will use internal on chip RC oscillator. In order to get better accuracy, switch to main crystal oscillator. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-05-25sunxi: non-FEL SPL boot support for sun7iIan Campbell
Add support for booting from an MMC card. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Henrik Nordström <henrik@henriknordstrom.net> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25sunxi: add gmac Ethernet supportIan Campbell
Add support for the GMAC Ethernet controller on Allwinner A20 (sun7i) processors. Enable for the Cubietruck. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25sunxi: add sun7i cpu, board and start of day supportIan Campbell
This patch adds generic board, start of day and basic build system support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Adam Sampson <ats@offog.org> Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Luc Verhaegen <libv@skynet.be> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Patrick Wood <patrickhwood@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25sunxi: add sun7i dram setup supportIan Campbell
This patch adds DRAM initialisation support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25sunxi: add sun7i pinmux and gpio supportIan Campbell
This patch adds the basic pinmux and gpio support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Henrik Nordström <henrik@henriknordstrom.net> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25sunxi: add sun7i clocks and timer support.Ian Campbell
This patch adds the basic clocks and timer support for the Allwinner A20 (sun7i) processor. This code will not been compiled until the build is hooked up in a later patch. It has been split out to keep the patches manageable. Some of the code here is common to multiple sunxi subarchtectures, hence files are named sun4i which is the earliest similar variant. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Jens Kuske <jenskuske@gmail.com> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25Arm64 fix a bug of vbar_el3 initializationDavid Feng
Signed-off-by: David Feng <fenghua@phytium.com.cn>
2014-05-24Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-05-23am33xx: report silicon revision instead of codeSergey Alyoshin
As revision code 1 is for silicon revision 2.0, it is easily confused with silicon revision 1.0. Device type report also reworked in same style. Signed-off-by: Sergey Alyoshin <alyoshin.s@gmail.com>
2014-05-23ARM: OMAP: Fix omap_sdram_size calculationLokesh Vutla
Last section of DMM is used for trapping tiler unmapped sections. Corresponding trap_size should be deducted from total SDRAM size only if trap section is overlapping with available SDRAM based on DMM sections. Fixing the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-05-23armv7:TI: Add <asm/ti-common/sys_proto.h> and migrate omap_hw_init_contextTom Rini
The omap_hw_init_context function (and assorted helpers) is the same for all OMAP-derived parts as when CHSETTINGS are used, that's the same and our DDR base is also always the same. In order to make this common we simply need to update the names of the define for DDR address space which is also common. Cc: Sricharan R. <r.sricharan@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-05-23ARM: DRA7xx: ctrl: Fix efuse register addressesLokesh Vutla
Efuse register addresses are wrongly programmed. Fixing the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Tom Rini <trini@ti.com>
2014-05-23ARM: DRA72x: Update EMIF dataLokesh Vutla
DRA72 has 1GB connected to EMIF1 only. Updating the details. And also enable WA for BUG0039 only if corresponding EMIF is present. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Tom Rini <trini@ti.com>
2014-05-23ARM: DRA72x: clocks: Update the hwdataLokesh Vutla
Adding the prcm, dplls, control module hooks for DRA72x. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Tom Rini <trini@ti.com>
2014-05-23ARM: DRA72x: volt: Update the pmic offsetsKeerthy
TPS65917 is used in DRA722 evm. Update the address offsets accordingly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Tom Rini <trini@ti.com>
2014-05-23ARM: DRA72x: Add Silicon ID supportLokesh Vutla
Add silicon ID code for DRA722 silicon. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Tom Rini <trini@ti.com>
2014-05-23ARM: omap: merge GPMC initialization code for all platformpekon gupta
GPMC controller on TI's OMAP SoC is general purpose controller to interface with different types of external devices like; - parallel NOR flash - parallel NAND flash - OneNand flash - SDR RAM - Ethernet Devices like LAN9220 Though GPMC configurations may be different for each platform depending on clock-frequency and external device interfacing with controller. But initialization sequence remains common across all platfoms. Thus this patch merges gpmc_init() scattered in different arch-xx/mem.c files into single omap-common/mem-common.c However, actual platforms specific register config values are still sourced from corresponding platform specific headers like; AM33xx: arch/arm/include/asm/arch-am33xx/mem.h OMAP3: arch/arm/include/asm/arch-omap3/mem.h OMAP4: arch/arm/include/asm/arch-omap4/mem.h OMAP4: arch/arm/include/asm/arch-omap5/mem.h Also, CONFIG_xx passed by board-profile decide config for which set of macros need to be used for initialization CONFIG_NAND: initialize GPMC for NAND device CONFIG_NOR: initialize GPMC for NOR device CONFIG_ONENAND: initialize GPMC for ONENAND device Signed-off-by: Pekon Gupta <pekon@ti.com> [trini: define GPMC_SIZE_256M for omap3] Signed-off-by: Tom Rini <trini@ti.com>
2014-05-23Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'Albert ARIBAUD
2014-05-23Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'Albert ARIBAUD
2014-05-21arm: rmobile: r8a7791: Fix MOD_SEL3 function table about FN_SEL_IEBNobuhiro Iwamatsu
FN_SEL_IEB is assigned 2bit, and 2bit can represent 4 patterns. However FN_SEL_IEB but we only use 3. It adds empty patterns as 0. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2014-05-16Merge remote-tracking branch 'u-boot-sh/rmobile'Albert ARIBAUD
Conflicts: boards.cfg Trivial conflict, maintainer change plus board addition
2014-05-16ARM: exynos: clock: modify the set_mmc_clk for exynos4Jaehoon Chung
Modified the mmc_set_clock for eynos4. The goal of this patch is that fsys-div register should be reset. And retore the div-value, not using the value of lowlevel_init. (For using SDMMC4, this patch is needs) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16arm: exynos: clock: Remove exynos4x12_set_mmc_clk functionBeomho Seo
exynos4x12_set_mmc_clk function have been removed. Because, exynos4x12_clock and exynos4_clock return same div_fsys* value. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Piotr Wilczek <p.wilczek@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Piotr Wilczek <p.wilczek@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16arm: exynos: pinmux: add sdmmc4 gpio configratuionBeomho Seo
For use dwmmc controller at exynos4, add SDMMC4 gpio configuration. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Piotr Wilczek <p.wilczek@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Piotr Wilczek <p.wilczek@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-15Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-05-15Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD
2014-05-15arm: move exception handling out of start.S filesAlbert ARIBAUD
Exception handling is basically identical for all ARM targets. Factorize it out of the various start.S files and into a single vectors.S file, and adjust linker scripts accordingly. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-05-15arm: remove unused _end_vect and _vectors_end symbolsAlbert ARIBAUD
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-05-15arm: pxa: move SP check from start.S to cpuinfo.cAlbert ARIBAUD
PXA start.S has a PXA (variant) specific check in start.S. Move it to cpuinfo.c. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Marek Vasut <marex@denx.de>
2014-05-15arm: move reset_cpu from start.S into cpu.cAlbert ARIBAUD
CPUs arm946es and sa1100 both define the reset_cpu() function in their start.S file. Move this cpu-specific code into cpu.c so that start.S only contains ARM generic code. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-05-15arm1136: move cache code from start.S to cache.cAlbert ARIBAUD
arch/arm/cpu/arm1136/start.S contain a cache flushing function. Remove the function and move its code into arch/arm/lib/cache.c. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-05-14zynq: treat ps7_init.c/h as external files to ignore themMasahiro Yamada
ps7_init.c and ps7_init.h are supposed to be exported by hw project and copied to board/xilinx/zynq/ directory. We want them to be ignored by git. So what we should do is to always treat them as external files rather than replacing ps7_init.c This commit does: - Move a weak function ps7_init() to arch/arm/cpu/armv7/zynq/spl.c and delete board/xilinx/zynq/ps7_init.c - Compile board/xilinx/zynq/ps7_init.c only when it exists - Add .gitignore to ignore ps7_init.c/h Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14ARM: zynq: ehci: Added USB host driver supportMichal Simek
Added USB host driver for zynq. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14ARM: zynq: Add MIO detection codeMichal Simek
Add run-time MIO pin detection to get actual pin configuration for specific periphery. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14ARM: zynq: Setup correct slcr_lock valueMichal Simek
The driver should setup slcr state according to slcr operations. Reported-by: Andrey Filippov <andrey@elphel.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14ARM: zynq: slcr: Fix incorrect commentaryMichal Simek
Fix c&p error in zynq_slcr_devcfg_enable() commentary and extending it with description according to Zynq TRM also in zynq_slcr_devcfg_disable(). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14ARM: zynq: Call zynq board_init() in SPLMichal Simek
Call board_init() if SPL is configured with CONFIG_SPL_BOARD_INIT. Signed-off-by: Michal Simek <monstr@monstr.eu>
2014-05-14ARM: zynq: Do not use half memory size for ECC caseMichal Simek
Memory size should be specified without ECC place. If you need to have half memory size, please change u-boot configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14ARM: zynq: Added efuse status register base addressSiva Durga Prasad Paladugu
Added efuse status register base address. This register is used for determining whether efuse was blown or not. Also, added the zynq_get_silicon_version() to get the silicon version of the zynq board. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14ARM: zynq: Fix sparse warning in ddrc.cMichal Simek
Warning: arch/arm/cpu/armv7/zynq/ddrc.c:43:24: warning: Using plain integer as NULL pointer Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14ARM: zynq: Fix sparse warnings in slcr.cMichal Simek
Warnings: arch/arm/cpu/armv7/zynq/slcr.c:21:6: warning: symbol 'zynq_slcr_lock' was not declared. Should it be static? arch/arm/cpu/armv7/zynq/slcr.c:27:6: warning: symbol 'zynq_slcr_unlock' was not declared. Should it be static? arch/arm/cpu/armv7/zynq/slcr.c:34:6: warning: symbol 'zynq_slcr_cpu_reset' was not declared. Should it be static? arch/arm/cpu/armv7/zynq/slcr.c:54:6: warning: symbol 'zynq_slcr_gem_clk_setup' was not declared. Should it be static? arch/arm/cpu/armv7/zynq/slcr.c:81:6: warning: symbol 'zynq_slcr_devcfg_disable' was not declared. Should it be static? arch/arm/cpu/armv7/zynq/slcr.c:94:6: warning: symbol 'zynq_slcr_devcfg_enable' was not declared. Should it be static? arch/arm/cpu/armv7/zynq/slcr.c:107:5: warning: symbol 'zynq_slcr_get_boot_mode' was not declared. Should it be static? arch/arm/cpu/armv7/zynq/slcr.c:113:5: warning: symbol 'zynq_slcr_get_idcode' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-13ARM: tegra: use a CPU freq that all SKUs can supportStephen Warren
U-Boot on Tegra30 currently selects a main CPU frequency that cannot be supported at all on some SKUs, and needs higher VDD_CPU/VDD_CORE values on some others. This can result in unreliable operation of the main CPUs. Resolve this by switching to a CPU frequency that can be supported by any SKU. According to the following link, the maximum supported CPU frequency of the slowest Tegra30 SKU is 600MHz: repo http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=summary branch l4t/l4t-r16-r2 path arch/arm/mach-tegra/tegra3_dvfs.c table cpu_dvfs_table[] According to that same table, the minimum VDD_CPU required to operate at that frequency across all SKUs is 1.007V. Given the adjustment resolution of the TPS65911 PMIC that's used on all Tegra30-based boards we support, we'll end up using 1.0125V instead. At that VDD_CPU, tegra3_get_core_floor_mv() in that same file dictates that VDD_CORE must be at least 1.2V on all SKUs. According to tegra_core_speedo_mv() (in tegra3_speedo.c in the same source tree), that voltage is safe for all SKUs. An alternative would be to port much of the code from tegra3_dvfs.c and tegra3_speedo.c in the kernel tree mentioned above. That's more work than I want to take on right now. While all the currently supported boards use the same regulator chip for VDD_CPU, different types of regulators are used for VDD_CORE. Hence, we add some small conditional code to select how VDD_CORE is programmed. If this becomes more complex in the future as new boards are added, or we end up adding code to detect the SoC SKU and dynamically determine the allowed frequency and required voltages, we should probably make this a runtime call into a function provided by the board file and/or relevant PMIC driver. Cc: Alban Bedel <alban.bedel@avionic-design.de> Cc: Marcel Ziswiler <marcel@ziswiler.com> Cc: Bard Liao <bardliao@realtek.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-05-13ARM: tegra: add function to enable input clamping on tristateStephen Warren
The HW-defined procedure for booting Tegra requires that CLAMP_INPUTS_WHEN_TRISTATED be enabled before programming the pinmux. Add a function to the pinmux driver to allow boards to do this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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