Age | Commit message (Collapse) | Author | |
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2016-06-28 | armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIs | Abhimanyu Saini | |
Currently layescape SoCs are not using cpu nodes. So removing them in favour of compatibly with similar SoCs that have different cores like LS2080A and LS2088A. This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> | |||
2016-06-03 | armv8: ls1012a: Add support of ls1012aqds board | Prabhakar Kushwaha | |
QorIQ LS1012A Development System (LS1012AQDS) is a high-performance development platform, with a complete debugging environment. The LS1012AQDS board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com> |