Age | Commit message (Collapse) | Author |
|
This commit switches to DM USB for warp7 and warp7_bl33 defconfigs.
Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
|
This commit switches to DM SERIAL for warp7 and warp7_bl33 defconfigs.
Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
|
Fix compatible node to use regular Toradex notation.
Annotate device tree with standard Colibri pin muxing comments.
Use open-drain I2C pin muxings.
Alphabetically re-order iomuxc nodes.
Rename snvs-ad7879-int-grp touch interrupt node as per Linux device tree.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
|
|
Add GPIO1_IO03__OSC32K_32K_OUT pin muxing.
While at it also fix indentation of pinfunc header file.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
|
|
Re-synced the device tree with Linux 5.0.
This fixes the following warnings:
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@2/endpoint@0:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@2/endpoint@1:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@2/endpoint@2:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@2/endpoint@3:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@2/endpoint@4:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@3/endpoint@1:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@3/endpoint@2:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@3/endpoint@3:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/
port@3/endpoint@4:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@0: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@0: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@1: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@1: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@2: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@2: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@3: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@3: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@4: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@2/endpoint@4: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@3/endpoint@1: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@3/endpoint@1: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@3/endpoint@2: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@3/endpoint@2: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@3/endpoint@3: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@3/endpoint@3: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@3/endpoint@4: Relying on default #address-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size):
/soc/ipu@2800000/port@3/endpoint@4: Relying on default #size-cells
value
w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_unnecessary_addr_size):
Failed prerequisite 'avoid_default_addr_size'
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
|
Port for the DART-6UL Evaluation Kit SBC. Based on the variscite
DART-6UL iMX6ULL SoM.
CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz)
CPU: Commercial temperature grade (0C to 95C) at 43C
Reset cause: POR
Model: Variscite DART-6UL Evaluation Kit
Board: Variscite DART-6UL Evaluation Kit
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
In: serial@02020000
Out: serial@02020000
Err: serial@02020000
Net: FEC0
Working:
- Eth0
- i2c
- MMC/SD
- eMMC
- USB host
- UART 1
Note: LCDIF porting needs DM_VIDEO
https://lists.denx.de/pipermail/u-boot/2019-April/365506.html
Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
|
|
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
|
|
This patch enable convert DM MMC for imx7d-pico board and variant.
Before the DM conversion only usdhc3 was enabled and therefore it appeared
as MMC 0 to u-boot. After enabling MMC DM though usdhc3 defaults to MMC 2,
which left unattended would drive changes to existing pico-pi bootscripts and
environment variables that rely on mmc 0.
Setup the alias of mmc0 and usdhc3 so that existing pico-imx7d boot code will
work unmodified.
When converting to DM_MMC it is necessary that SPL initializes eMMC
by itself, so move the original eMMC initialization from U-Boot
proper to SPL.
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
|
|
Add support for lpuart1, lpuart2 and lpuart3.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
|
|
This patch imports the Linux kernel base board imx7d-pico.dtsi,
pi board imx7d-pico-pi.dts and hobbit board imx7d-pico-hobbit.dts
from Linux v5.1-rc1.
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
|
|
Remove vendor pre-fix fsl, from uart-has-rtscts property.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
|
|
Migrate Ethernet FEC to using driver model.
Drop PHY_MICREL_KSZ90X1 which slipped in from Apalis iMX6.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
|
|
Migrate USB to using driver model.
Add USBH_PEN GPIO regulator.
While at it also add alias e.g. as required for UMS.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
|
|
Migrate MMC to using driver model.
Migrate USDHC to using pinctrl.
While at it also add GPIO1_IO03__OSC32K_32K_OUT pin muxing.
While at it also update copyright period.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
|
|
The implicit fallback mechanism for searching the whole MDIO bus for at
least one PHY has been gone with the following commit b882005a18de
("drivers/net/fec: phy_init: remove redundant logic"). This lead to the
Ethernet driver erroring out as follows:
Net: Could not get PHY for FEC0: addr -19
eth-1: fec@400d1000
Colibri VFxx # dhcp
Could not get PHY for FEC0: addr -19
Could not get PHY for FEC0: addr -19
Could not get PHY for FEC0: addr -19
Could not get PHY for FEC0: addr -19
No ethernet found.
Could not get PHY for FEC0: addr -19
Colibri VFxx #
This commit adds an explicit PHY node which makes it work again.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
|
|
Add i.MX8QM MEK board support.
Included a basic dts, enabled SPL FIT
Boot log as below:
U-Boot SPL 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800)
Normal Boot
Trying to boot from MMC2_2
U-Boot 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800)
CPU: NXP i.MX8QM RevB A53 at 142933 MHz
Model: Freescale i.MX8QM MEK
Board: iMX8QM MEK
Build: SCFW 9330215b
Boot: SD1
DRAM: 6 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial@5a060000
Out: serial@5a060000
Err: serial@5a060000
Net:
Error: ethernet@5b040000 address not set.
eth-1: ethernet@5b040000
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
|
Introduce basic dtsi for i.MX8QM, only support SDHC/FEC/LPUART.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
|
This commit enables the support for K&P's HSC|DDC imx53 based boards.
It was also necessary to provide device tree description for regulators
to avoid board specific code definition.
The GPIO pin description responsible for VBUS control has been moved from
"hog" group to usbh1 dedicated one.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
This code has been ported from Linux kernel - tag v5.1-rc2.
The difference from the kernel is the removal of:
fsl,usbmisc = <&usbmisc 1>;
fsl,usbphy = <&usbphy1>;
properties, which are not needed for correct u-boot operation (as PHY
setup is done in ehci-mx5.c file itself).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
In this commit the esdhc3 controller is enabled as well as it is remaped
to mmc0 to not break legacy code.
The pinctrl setup (e.g. 0x1e4) is the same as one from in-board file
definition.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
|
|
with u-boot,dm-spl added for imx8qx-pm node, and SPL_SIMPLE_BUS enabled,
the bind and probe code in board file could be removed.
Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
|
Add support for MediaTek MT8516 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
The 'phy' reset of gmac device in kernel device tree is not generic
enough for u-boot to use, so we need to overwrite the 'resets' property
as needed. With this device tree fixup and poplar_defconfig changes,
Ethernet starts working on Poplar board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
|
|
Enable the led controller in the device tree
of the board bcm963158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
|
|
Add the led controller in the bcm63158 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
|
|
Enable the led controller in the device tree
of the board bcm968580xref.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
|
|
Add the led controller in the bcm6858 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
|
|
Enable the nand controller in the device tree
of the board bcm963158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
|
|
Add the nand controller in the bcm63158 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
|
|
Enable the nand controller in the device tree
of the board bcm968580xref.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
|
|
Add the nand controller in the bcm6858 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
|
|
Second set of u-boot-atmel features and fixes for 2019.07 cycle
|
|
- Various fastboot, dwc2/stm32 updates
|
|
- Various stratix10, gen5 updates
|
|
The DK1 and DK2 boards use the USB Type-C controller STUSB1600.
This patch updates:
- the device tree to add the I2C node in the DT
- the board stm32mp1 to probe this I2C device and use this controller
to check cable detection.
- the DWC2 driver to support a new dt property
"u-boot,force-b-session-valid" which forces B session and
device mode; it is a workaround because the VBUS sensing and
ID detection isn't available with stusb1600.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
|
Use the DWC2 device driver with DM_USB_GADGET support and
cleanup the USB support in STM32MP1 board.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
Move supply vdda1v1 and vdda1v8 in usbphyc node and
no more in port
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
|
|
MACB has a fixed link connection to KSZ8563 switch port.
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
|
|
The SAMA5D2 ICP Board features the SAMA5D27 SoC,
together with QSPI Flash, Wilc3000 wireless device and
EtherCat support.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
|
|
Merge qspi dts node from Linux.
Commit 0cb140d07fc75fb (arm64: dts: stratix10: Add QSPI support for Stratix10)
Add -u-boot.dtsi files for non Linux dts properties and
update properties for Uboot.
- add u-boot,dm-pre-reloc
- add alias for spi0
- change compatible for flash
- support quad read and quad write
- change maximum frequency to 100MHz
Tested on Stratix 10 SoC devkit.
SOCFPGA_STRATIX10 # sf probe 0:0
SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
|
|
The stratix10 socdk ships with 4GB of memory. Modify the
device tree to represent this. Note that to access 4GB of
memory in Stratix 10, due to the IO space from 2GB to 4GB,
we use the fact that the DDR controller ignores upper address
bits outside of the configured DRAM's size. This means that
, the 4GB DRAM is mapped to memory every 4GB.
For an 8GB memory, you can either live with the 2GB IO space,
and loose access to that memory from the processor, or use
the same trick:
Loose 2GB of memory:
memory {
device_type = "memory";
/* 8GB */
/* first 2GB */
reg = <0 0x00000000 0 0x80000000>,
/* last 4GB */
<1 0x00000000 1 0x00000000>;
u-boot,dm-pre-reloc;
};
or to map it all:
memory {
device_type = "memory";
/* 8GB */
/* first 2GB */
reg = <0 0x00000000 0 0x80000000>,
/* next 6GB */
<2 0x80000000 1 0x80000000>;
u-boot,dm-pre-reloc;
};
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
|
|
To clean up reset handling for socfpga gen5, port the DDR driver to DM
using UCLASS_RAM and implement proper reset handling.
This gets us rid of one ad-hoc call to socfpga_per_reset().
The gen5 driver is implemented in 2 distinct files. One of it (containing
the calibration training) is not touched much and is kept at using
hard coded addresses since the code grows even more otherwise.
SPL is changed from calling hard into the DDR driver code to just
probing UCLASS_RESET and UCLASS_RAM. It is happy after finding a RAM
driver after that.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
|
|
The SPL for socfpga gen5 currently takes all peripherals out of reset
unconditionally. To implement proper reset handling for peripherals,
the reset node has to be provided with the SPL dts.
In preparation to move the DDR driver to DM, the sdr node is required
in SPL, too.
This patch adds "u-boot,dm-pre-reloc" to U-Boot specific dtsi addon
files so that the reset manager and SDR driver correctly probe in SPL.
It centralizes these settings into a common file since in contrast to
boot-type specific nodes, "soc", "rst" and "sdr" are always needed.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
|
|
This is again a sync to linux-next + pending patches in Dinh's tree at
commit 1c909b2dfe6a ("ARM: dts: socfpga: update more missing reset
properties")'
It adds missing peripheral reset properties to socfpga.dtsi and removes
U-Boot specific leftovers from socfpga_cyclone5_socrates.dts.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
|
|
U-Boot support for the CL-SOM-AM57x module is no longer required.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
|
|
- Convert DM_MMC and DM_SCSI
- A20, R40, H6 Linux dts(i) sync
- CLK, RESET support for sunxi, sun8_emac net drivers
|
|
Xilinx/FPGA changes for v2019.07
fpga:
- Add support for external data in FIT
- Extend testing for external data case
- Inform user about a need to run post config on Zynq
arm:
- Tune zynq command functions
- Fix internal variable setting
arm64:
- Add support for zc39dr decoding
- Disable WDT for zcu100
- Small changes in reset_reason()
- Some DT changes (spi)
- Tune qspi-mini configuration
- Remove useless eeprom setting
- Fix two sdhci boot case
spi:
- Fix tap delay programming
clk:
- Enable i2c in SPL
net:
- Fix gem phydev handling
- Remove phy detection code from gem driver
general:
- Correct EXT_DTB usage for MULTI_DTB_FIT configuration
|
|
UniPhier SoC updates for v2019.07
- Sync DT with Linux 5.1-rc4
- Enable CONFIG_SUPPORT_EMMC_RPMB for uniphier_v8_defconfig
|
|
Enable ahci node for BPI-M2-Berry, this would require since
we have DM_SCSI enabled on the respective SoC.
Unable to sync the same node from Linux, since the similar change
is still in Linux ML.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|
|
Enable ahci node for a20-wits-pro-a20-dkt, this would require since
we have DM_SCSI enabled on the respective SoC.
Right now, ahci enabled in -u-boot.dtsi and will remove once same
supported by Linux.
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
|